an5165 jungla

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ICs for TV

AN5165KA Single Chip IC for NTSC Color-TV

OverviewThe AN5165K is an IC in which all of the NTSC

system color television signal processing circuits are in-tegrated on a single chip. The rationalization of set pro-duction line can be realized by this IC incorporating I 2Cbus interface.

Features Built-in video IF circuit, sound IF circuit, video signal

processing circuit, color signal processing circuit, de-flection correction circuit and sync. signal processing

circuit Built-in I 2C bus interface

Applications TVs

1

26 27

52

4 7

. 7 0

. 3

13.70.3

(15.24)3 to 15 3 to 15

(0.7)

3.850.3 (3.3)

1 . 7

7 8

0 . 5

0

. 1

1 . 0

0

. 2 5

Unit: mm

SDIP052-P-0600A

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AN5165K ICs for TV

27

28

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31

32

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35

36

37

38

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41

42

43

44

45

46

47

48

49

50

51

52

Ext.Audio

SIF In

IF AGC

Video Out

AFT Out

Int.V

DET Out

APC

VCO1

VCO2

IF 9 V

BLDET

V Sync. Y In

V Clamp

H Sync.

V/C/J/5 V

C In

VCJ GND

FBP In

6.3 V

AFC1

HOSC

X-ray

H Out

CW Out

V Out1 1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

1920

21

22

23

24

25

26 Decoupling

Ext.Video

Audio Out

APC

RF AGC Out

GND (IF)

IF 5 V

9 V

BLK In (SCP)

SCL

SDA

ACL/NECK

GND (RGB)

Lock DET

B

G

R

V/C/J 9 V

B In

G In

R In

YS&Y M

APC

Chroma VCO

X - r a y

G a i n

C o n

t r o l

H V C O

V e r . O

u t

V e r .

C o u n t

D o w n

t o V i d e o

R G B

V B L K

C C P ( H o s c 4

)

T r i g 1

T r i g 2

A T r i g

P . E Q P

H C e n

t e r

2 f H

3 2 f H

H . E

Q P

H B L K

K i l l e r O

f f S W

7 - b

i t

5 - b i t

B P F S W

7 - b i t

3 - b i t

O n /

O f f S W 7

- b i t

A B L S W D

C

8 - b i t

O n /

O f f S W

6 - b i t

4 - b i t

D C

7 - b i t

9 - b i t

5 - b

i t

8 - b i t

C u t

O f f

C u t

O f f B S W

C u t

O f f R S W

7 - b i t

D r i v e

R G B L i m i t

3 - b i t

H o r .

C o u n t

D o w n

A C C D E T

S h a r p n e s s

C V C l a m p

A C C 1

A P C

T i n t

C F i l t e r

Y S

& Y

M

H o r .

S y n c . S

e p .

V e r .

S y n c . S

e p .

H B L K

A F C 1

L o c

k D E T

A F C 2

C W

O u t

K i l l e r

L . P . F .

Y . N . R

B . P . F . 2

B . P . F . 1

B . G . P

D L

T r a p

V C O

P T

L . P . F .

A P C

V C O

C T R L

V A S W

I F A G C

I F D E T

R F

A G C

V I F

A m p .

V A M P

N I

S I F

A F T

V S W

C u t o f

f

D r i v e

V C O

Y C o n

t r a s

t

Y C l a m p

B r i g

h t

B l a c k

E x p a m s i o n

A C C 2

C o n

t r a s t

C o l o r

D E M

S W

D A C

S W D A C

D A C

S W D A C

S W

D A C

S W V S W

D A C

D A C

D A C

D A C

S W

D A C

D A C

D A C S W

D A C

S W

D A C

S W S . S W

t o V i d e o

R A M P

P L L

D E M P

V O L

A S W

t o C h r o m a

H O u t

2

H O u t

1

H o s c 2

H P l u s e

H o s c 1

Block Diagram

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ICs for TV AN5165K

Pin Description

Pin No. Description

28 SIF Input/White Expand-Level

29 IF AGC Filter

30 Video Output31 AFT Output

32 Internal Video Input

33 VIF Detect Output

34 VIF APC Filter

35 VIF VCO (1)

36 VIF VCO (2)

37 V CC1-2 9 V

38 Black Detect39 Y/Ver. Sync. Input

40 Ver. Sync. Clamp

41 Hor. Sync. Input

42 V CC2-2 5 V (Chroma/jungle/DAC)

43 Chroma Input/Black Expansion Start

44 GND (Video/Chroma/Jungle)

45 FBP Input

46 V CC3 6.2 V47 AFC1 Filter

48 Hor. VCO (32 f H)

49 X-ray Protection Input

50 Hor. Pulse Output

51 CW Output/Spot KILLER Off Input/

X-ray Protection Output

52 Ver. Pulse Output

Pin No. Description

1 Chroma VCO (3.58 MHz)

2 Chroma APC Filter

3 Y S & Y M Input4 External R Input

5 External G Input

6 External B Input

7 V CC1-1 9 V (VCJ)

8 R Output

9 G Output

10 B Output

11 Hor. Lock Detect12 GND (RGB/I 2C/ DAC)

13 ACL/NECK Protect

14 SDA

15 SCL

16 BLK Pulse Input/H SYNC2 Output

17 White Detect

18 V CC2-1 5 V (VIF/SIF)

19 VIF Input (1)20 VIF Input (2)

21 GND (VIF/SIF)

22 RF AGC Output

23 SIF APC Filter

24 Audio Output

25 External Video Input

26 DC Decoupling Filter

27 External Audio Input

Parameter Symbol Rating Unit

Supply voltage V CC VCC1 (737) 10.5 V

VCC2 (1842) 6.0

VCC3 (46) 6.5

Supply current I CC I7+37 117 mA

I18+42 68I46 6.3

Absolute Maximum Ratings

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AN5165K ICs for TV

Parameter Symbol Conditions Min Typ Max Unit

Power supply

Supply current 1 I 7+ I37 Current at V 7 = 9 V, current at 68 85 100.5 mAV37 = 9 V

Supply current 2 I 18+ I42 Current at V 18 = 5 V, current at 38 48 57 mAV42 = 5 V

Supply current 3 I 46 Current, when V 46 = 6.2 V 2 5 6 mA

Supply current 4 I 46 Current at V 46 = 6.2 V. However 5 7 9 mAall other power supplies are off state

VIF circuit (Typical input f P = 45.75 MHz, V IN = 90 dB )

Video detection output (typ.) V PO Modulation factor m = 87.5% 1.75 2.1 2.5 V[p-p]Data 0D = 88

Video detection output (max.) V POmax Data 0D = F8 2.15 2.6 3.3 V[p-p]

Video detection output (min.) V POmin Data 0D = 08 1.1 1.6 2.0 V[p-p]

Video detection output f characteristics f PC Frequency of output 3 dB for 1 MHz 5.5 8 12 MHz

Synchronous peak value voltage V SP Voltage in V PO measurement 1.6 2.0 2.4 V

APC pull-in range (Hu) f PPHU High band side pull-in range 1.0 1.5 MHz(Difference from f P = 45.75 MHz)

APC pull-in range (Lu) f PPLU Low band side pull-in range 1.5 1.0 MHz

(Difference from f P = 45.75 MHz)

RF AGC delay point adjustment DV RFDP Input to become delay point 75 95 dBmrange (V 22 = approx. 6.5 V), when Data

0C = 00 to 7F

RF AGC maximum sink current I RFmax Maximum current IC can sink when 1.5 3.0 mApin 22 is low

Parameter Symbol Rating Unit

Power dissipation *2 PD 1 481 mW

Operating ambient temperature *1 Topr 20 to +70 C

Storage temperature*1

Tstg 55 to +150 C

Absolute Maximum Ratings (continued)

Note) *1: Except for the operating ambient temperature and storage temperature, all ratings are for T a = 25 C.

*2: The power dissipation shown is the value for T a = 70 C

Recommended Operating Range

Parameter Symbol Range Unit

Supply voltage V CC1 8.1 to 9.9 V

VCC2 4.5 to 5.5

VCC3 6.05 to 6.35

Electrical Characteristics at T a = 25 C

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VIF Circuit (continued) (Typical input f P = 45.75 MHz, V IN = 90 dB )

RF AGC minimum sink current I RFmin Leak current of IC, when pin 22 is 50 0 50 mA

highAFT discrimination sensitivity AFT Df = 25 kHz 40 57 75 mV/kHz

AFT center voltage V AFT V31 without V IN 4.0 4.5 5.0 V

AFT maximum output voltage V AFTmax V31 at f = f P500 kHz 7.8 8.1 8.7 V

AFT minimum output voltage V AFTmin V31 at f = f P+500 kHz 0.3 0.8 1.0 V

SIF circuit (Typical input f S = 4.5 MHz, f M = 400 Hz, V IN = 90 dB )

Audio detection output V SO Df = 25 kHz, 0A = 10 250 350 450 mV[rms]

Audio detection output (max.) V SOmax Data 0A = 1F 300 390 480 mV[rms]

Audio detection output (min.) V SOmin Data 0A = 00 150 256 350 mV[rms]

SIF pull-in range f SP 3.3 5.7 MHz

AV SW circuit

Video SW voltage gain G VSW f = 1 MHz, V IN = 1 V[p-p] 6.2 7.2 8.2 dB

Video SW frequency characteristics f VSW Frequency of output 3 dB from 1 MHz 10 MHz

Audio SW voltage gain G ASW Data 0 F D5 = 1 (external) 3 1 1 dBf = 400 Hz, V IN = 1 V[p-p]

Video signal processing circuit (In the following test conditions, the measurements are made withinput: 2.0 V[p-p] (V WB = 1.43 V[0-p]stair-step) at G OUT .)

Video output (typ.) V YO Data 03 = 40 (typ.) (Contrast) 1.9 2.4 2.9 V[0-p]

Video output (max.) V YOmax Data 03 = 7 F (max.) 3.8 4.8 5.8 V[0-p]

Video output (min.) V YOmin Data 03 = 00 (min.) 0.07 0.3 0.6 V[0-p]

Contrast variable range Y Cmax/min 03 = 7F 19 22 26 dB03 = 00

Video frequency characteristics f YC Data 0F D7 = 0 (Trap Off) 6.0 8.0 10.0 MHzData 04 = 00 (Sharpness)

Frequency to become 3 dB fromf = 0.5 MHz

Sharpness variable range Y Smax/min 04 = 3F f = 3.8 MHz 7 10.5 14 dB04 = 00 Data 0F D7 = 0

Pedestal level (typical) V PED Data 02 = 80 (typ.) (Brightness) 2.4 3.0 3.6 V

Pedestal variable width VPED Difference between Data 02 = 00 2.2 2.6 3.0 Vand FF

Brightness control sensitivity VBRT Average amount of change per 1 step, 9.5 12.5 15.5 mV/Stepwhen Data 02 = 60 and A0

ACL sensitivity ACL Change of YOUT from V13 = 3.0 V to 3.5 V 2.3 2.9 3.6 V/V

Blanking level V YBL DC voltage of blanking pulse 0.9 1.4 1.9 V

Electrical Characteristics at T a = 25 C (continued)

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Video signal processing circuit (continued) (In the following test conditions, the measurements are made withinput: 2.0 V[p-p] (V WB = 1.43 V[0-p] stair-step) at G OUT .)

Video input clamp current I YCLP DC measurement: Sink current inside IC 5 10 15 AACL start point V ACL V13 voltage at which output amplitude 3.5 4.0 4.5 V

becomes 90% when ACL pin (V 13)is being decreased from 5 V.

Color signal processing circuit (In the following test conditions, burst = 300 mV[p-p], reference is B OUT )

Color difference output (typ.) V CO Input: Color bar 2.8 3.5 4.2 V[p-p]Data 00 = 40 (typ.), 03 = 40 (typ.)

Color difference output (max.) V COmax Data 00 = 7 F one side amplitude 2.3 3.4 V[0-p]Data 03 = 40

Color difference output (min.) V COmin Data 00 = 00, Data 03 = 40 0 100 mV[p-p]

Contrast variable range C Cmax/min 03 = FF Data 00 = 40 15 20 25 dB03 = 00

ACC characteristics 1 ACC1 Burst 300 mV[p-p] 600 mV[p-p] 0.8 1.0 1.2 TimeInput: Color bar

ACC characteristics 2 ACC2 Burst 300 mV[p-p] 60 mV[p-p] 0.7 1.0 1.2 TimeInput: Color bar

Tint center C Difference (Tint) between Data 01= 40 13 0 13 STEPand that of tint adjusted at center

Tint variable range 1 1 Data 01 = 7F 30 45 60 deg

Tint variable range 2 2 Data 01 = 00 60 45 30 deg

Demodulation output ratio (R) R/B Input: Rainbow 0.81 0.95 1.09 Time

Demodulation output ratio (G) G/B Input: Rainbow 0.3 0.36 0.42 Time

Demodulation output angle (R) R Input: Rainbow 92 104 116 deg

Demodulation output angle (G) G Input: Rainbow 223 235 237 deg

APC pull-in range (H) f CPH 450 900 Hz

APC pull-in range (L) f CPL 900 450 HzRGB processing circuit

Pedestal difference voltage V IPL Difference voltage of RGB out pedestal 0.3 0.3 V

Brightness voltage tracking TBL Ratio of R, G, B out fluctuation level 0.9 1.0 1.1 Time for Data 02 (Bright) 02 = 40 to C0

Video voltage gain relative ratio GYC Output ratio of R, B out to G OUT 0.8 1.0 1.2 Time

Video voltage gain tracking TCONT Gain ratio of R, G, B out for Data 0.9 1.0 1.1 Time/ 03 (Contrast) 03 = 20 to 60 Time

Drive adjustment range G DV AC change amount of R, B out between 5.9 7.1 8.3 dBdrive adjustment max. and min.

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ICs for TV AN5165K


RGB processing circuit (continued)

Cutoff adjustment range V CUTOFF DC change amount of R, G, B out 1.8 2.4 3.0 V

between drive adjustment max. and min.YS threshold voltage V YS Minimum DC voltage at which Y S 2.7 3.1 3.6 V

turns on

YM threshold voltage V YM Minimum DC voltage at which Y M 0.7 1.0 1.3 Vturns on

YM operating voltage gain GYM YM on/off gain difference 12 9 6 dB

External RGB pedestal voltage V EPL YS is on 2.1 2.7 3.3 V

External RGB pedestal difference VEPL YS is on, R G, G B 250 250 mVvoltage

Internal/external pedestal difference VPL/IE Internal external 100 200 500 mVvoltage

External RGB output voltage V ERGB Input 3 V[p-p], contrast 03 =7 F 1.2 1.7 2.2 V[0-p]

External RGB output difference VERGB Input 3 V[p-p], contrast 03 = 7F 0.6 0 0.6 Vvoltage

External RGB contrast variable range E Cmax/min 03 = 7F 5 8 11 dB03 = 00

External RGB frequency characteristics f RGBC Input 0.2 V[p-p] , DC = 1 V 8 12 MHz

Synchronizing signal processing circuitHorizontal free-running oscillation f HO Without sync. signal input 15.4 15.75 16 kHzfrequency

Horizontal pull-in range f HP Difference from f H = 15.75 kHz 500 650 Hz

Vertical free-running oscillation f VO-N Without sync. signal input 58 60 62 Hzfrequency

Vertical output pulse width VO 5.5 6.5 7.5 1/f H

Picture center variable range THC Change amount of phase difference 5.9 7.3 9.1 sbetween H SYNC and H OUT Data from0E: 00 to 1F

I2C interface

SCL, SDA signal input high level V IHI 3.1 5.0 V

SCL, SDA signal input low level V ILO 0 0.9 V

Allowable maximum input frequency f Imax 100 kbit/s


Design reference dataNote) The characteristics listed below are theoretical values based on the IC design and are not guaranteed.

Parameter Symbol Conditions Min Typ Max UnitVIF Circuit (Typical input f P = 45.75 MHz, V IN = 90 dB )

Input sensitivity V PS Input level to become V PO = 3 dB 52 60 dB

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VIF circuit (continued) (Typical input f P = 45.75 MHz, V IN = 90 dB )

Maximum allowable input V Pmax Input level to become V PO = +1 dB 104 110 dB

SN ratio SN P 50 53 dB

Differential gain DG P 0 3 5 %

Differential phase DP P 0 3 5 deg

Black noise detection level VBN Difference from sync. peak value 55 45 35 IRE

Black noise clamp level VBNC Difference from sync. peak value 35 45 55 IRE

RF AGC operation sensitivity G RF Input level difference to become 0.5 1.5 3.0 dBV

22= 1 V 7 V

VCO switch on drift f PD Frequency drift from 5 seconds 70 kHzafter SW On to 5 mins. after

Intermodulation IM V FCVFP = 2 dB, V FSVFP = 12 dB 46 52 dB

RF AGC adjustment sensitivity S RF Average amount of change of output 1.0 1.7 2.5 V/Stepvoltage V 22 for Data 1Step

AFT offset adjustment sensitivity S AFT Average amount of change of output 0.15 0.2 0.25 V/Stepvoltage V 31 for Data 1Step

Video detection output fluctuation VP/V VCC = 10% 10 15 %

with V CC

Video detection output-temperature VP/T Ta = 20C to +70C 5 10 % characteristics

Input resistance (pin 19, 20) R I19,20 f = 45.75 MHz 1.2 k

Input capacitance (pin 19, 20) C I19,20 f = 45.75 MHz 4.0 pF

Sound IF output level V SIF f S = 45.75 MHz 4.50 MHz, 94 100 106 dBmP/S = 20 dB

VCO control sensitivity 1 PU DV34 = 2.0 V 3.8 V, f = 45.75 MHz 1.3 2.2 3.1 kHz/mV

VCO control sensitivity 2 PJ DV34 = 2.0 V 3.8 V, f = 58.75 MHz 1.3 2.2 3.1 kHz/mVRF AGC delay point VDP/T Ta = 20C to +70C 0 3 5 dB-temperature characteristics

VCO free-running frequency f P/T Ta = 20C to +70C 300 kHz-temperature characteristics

AFT center frequency f AFT/T Ta = 20C to +70C 300 kHz-temperature characteristics Input frequency at which AFT output

voltage becomes 4.5 V

VCO free-run adjustment V AFTADJ AFT center voltage adjustment 4.5 V

VCO free-running frequency 1 f P1 Dispersion without V IN . 300 0 300 kHzV29 (IF AGC) = 0 V (Differencefrom 45.75 MHz is measured)

Electrical Characteristics at T a = 25 C (continued) Design reference data (continued)

Note) The characteristics listed below are theoretical values based on the IC design and are not guaranteed.

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ICs for TV AN5165K


VIF circuit (continued) (Typical input f P = 45.75 MHz, V IN = 90 dB )

VCO free-running frequency 2 f P2 Dispersion without V IN . 300 0 300 kHzV29 (IF AGC) = 0 V (Differencefrom 58.75 MHz is measured)

APC pull-in range (Hj) f PPHJ High band side pull-in range 1.0 1.5 MHz(Difference from f P = 58.75 MHz)

APC pull-in range (Lj) f PPLJ Low band side pull-in range 1.5 1.0 MHz(Difference from f P = 58.75 MHz)

Detection output resistance R O33 DC measurement 70 120 170

SIF circuit (Typical input f S = 4.5 MHz, f M = 400 Hz, V IN = 90 dB )Input limiting level V LIM Input level to become V SOP = 3 dB 44 50 dB

AM rejection ratio AMR AM = 30% 60 70 dB

Total harmonic distortion THD Df = 50 kHz 0 0.3 0.5 %

SN ratio SN A 50 55 dB

Audio detection output linearity VSOP Ratio of f = 50 kHz to 5 6 7 dBf = 25 kHz

Audio output fluctuation with V CC VS/V VCC = 10% 3 6 %

Audio output-temperature VS/T Ta = 20C to +70C 5 10 %characteristics

Audio output-frequency f SOP1 APC pin C = 100 pF 100 kHzcharacteristics 1

Audio output-frequency f SOP2 APC pin C = 5600 pF 2.2 kHzcharacteristics 2

AV SW circuit

Video SW crosstalk CT VSW f = 1 MHz, V IN = 1 V[p-p], 60 50 dBInside Outside, Outside Inside

Video SW external input terminal V 25 DC measurement 1.3 1.6 1.9 Vvoltage

Video SW internal input terminal V 32 DC measurement 1.3 1.6 1.9 Vvoltage

Video SW internal output DC voltage V 30I DC measurement Data 04 D6 = 0 3.4 4.2 5.0 V

Video SW external output DC voltage V 30E DC measurement Data 0F D5 = 1 3.4 4.2 5.0 V

Video SW input resistance R I25, 32 DC measurement 524

Video SW output resistance R O30 DC measurement 20 50 100



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AV SW circuit (continued)

Audio SW crosstalk CT AIE f S = 4.5 MHz, f M = 400 Hz, 73 67 dB(Internal External) No external input

Audio SW crosstalk CT AEI f S = 4.5 MHz, f M = 0 Hz, External 73 67 dB(External Internal) f = 400 Hz, V IN = 600 mV[rms]

Audio SW input terminal voltage V 27 DC measurement 3.7 4.2 4.7 V

Audio SW internal output DC voltage V 24I DC measurement 3.7 4.2 4.7 V

Audio SW external output DC voltage V 24E DC measurement 3.7 4.2 4.7 V

Audio SW internal/external DC V24 DC measurement 300 0 300 mVdifference voltage

Audio SW input resistance R I27 DC measurement 61 72 83 k

Audio SW output resistance R O24 DC measurement 200 400 600

Video signal processing circuit (In the following test conditions, the measurements are made with input 2.0 V[p-p](VWB = 1.43 V[0-p]) G OUT )

Y signal delay time 1 T DL1 Phase difference from Y-input 620 690 760 ns(For both trap on/off)

Y signal delay time 2 T DL2 Phase difference from Y-input 200 ns

(Trap through)Black level extension 1 V BL1 Input: Total black, difference between 100 0 100 mV

pin 38 of 9 V and open (With RC filter)

Black level extension 2 V BL2 Input: Total black, pin 38 GND and 700 900 1 300 mVblack slice potential V 43 = 2.5 V

Black level extension 3 V BL3 Voltage difference between pin 38 400 600 800 mVopen and 9V. Black slice potentialV43 = 2.5 V

Contrast variation with sharpness DV CS YOUT output level difference between 300 0 300 mV

sharpness max. and min.Contrast variation with sharpness DV BS Pedestal level DC difference between 250 0 250 mV

sharpness max. and min.

Input dynamic range V Imax Contrast 03 = 40 2.8 V[p-p]

Y signal SN ratio SN Y Contrast 03 = 7F 51 56 dB

Black level extension start point V BLS Start point when V 43 = 4.5 V 50 57 64 IRE

Trap on/off through-gain difference DG TRAP Trap on/off/through 1 0 1 dB

Trap frequency error Df TRAP Trap center frequency at chroma 70 0 70 kHz

input 3.58 MHzTrap attenuation amount Att TRAP 3.58 MHz component attenuation 26 30 dB

amount at chroma input 3.58 MHz



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Video Signal Processing Circuit (continued) (In the following test conditions, the measurements are made withinput 2.0 V[p-p] (VWB = 1.43 V[0-p]) G OUT )

Trap automatic adjustment range f TRAP VCO frequency of f TRAP 70 kHz 3 4 MHz

Video output fluctuation with V CC VY/V VCC1 = 9 V (allowance: 10%) 0 100 250 mV/V

Video output-temperature characteristics VY/T Ta = 20C to +70C 0 5 10 %

YNR operation I SN YNR S/N, when YNR: min. max. and 4 dB sharpness max.

YNR operation II SN YNR Sharpness max., YNR: max. 1.5 dB(IFAGC) S/N at IF AGC 2 V 4 V

ABL sensitivity ABL 01 D7 = 1, when V 13 = 1.5 V 3.5 V 0.3 0.5 0.7 V/VPedestal level fluctuation

White gradation correction 1 1 White detection pin V 17 = 4.5 V 120 125 130 %Difference of amplitude betweenGOUT gamma on/off

White gradation correction 2 2 White detection pin V 17 = 2.0 V 70 75 80 %Difference of amplitude betweenGOUT gamma on/off

Neck protector threshold voltage V NP 0.3 0.5 1.0 V

DC restoration ratio T DC APL 10% to 90% 90 100 110 %

TDC =

ACDC 100AC

Color signal processing circuit (Burst 300 mV[p-p], reference is B OUT )

Demodulation output residual carrier V CAR f SC level of pin 8, 9, 10 0 50 mV[p-p]

VCO free running frequency f CN Difference from f = 3.579545 MHz 300 0 300 Hz

f CO fluctuation with V CC VC/V VCC1 = 9 V (allowance: 10%) 300 0 300 Hz

Static phase error N Tint shift at 1 3 deg/100 Hz

f C = 300 to +300 Hz changeDemodulation output bandwidth f CC Band to become 3 dB 400 600 800 kHz

Demodulation output fluctuation VC/V VCC1 = 9 V (allowance: 10%) 4 %with V CC

Demodulation output VC/T Ta = 20C to +70C 10 20 %-temperature characteristics

Brightness variation with color V BC Pedestal level DC difference between 250 0 250 mVcolor max. and min.

Brightness variation difference VBC R, G, B Out variation voltage 0 20 mVvoltage with color difference



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Color signal processing circuit (continued) (Burst 300 mV[p-p], reference is B OUT )

Color killer allowance 1 V KILL1 0 dB = 300 mV[p-p], 00 D7 = 0 53 46 39 dB

Color killer allowance 2 V KILL2 0 dB = 300 mV[p-p], 00 D7 = 1 50 43 36 dB

CW output level (3.58 MHz) V CW AC component of (3.58 MHz) 0.6 1.1 1.4 V[p-p]

B.P.F. (Symmetrical) frequency f B.P.F. Band to become 400 600 800 kHzcharacteristics 3 dB from 3.58 MHz

B.P.F. (Asymmetrical) slant V B.P.F./f Slant of 3.58 MHz 500 kHz 9.0 dB/MHz

RGB processing circuit

(CY)/Y RC/Y

Color bar input, BOUT

0.9 1.2 1.5 V[0-p]/ Contrast typ. color Data 00 = 60 V[p-p]

(CY), Y delay difference TC/Y Color bar input, B OUT 100 0 100 nsPhase of green magenta

YS changeover speed f YS f YS , when external input is 3 V, 7 11 MHzoutput level 3 dB

External RGB input dynamic range V DEXT Contrast max. Data 03 = 7F 6.5 7.0 V[0-p]

Internal/external crosstalk CT RGB Leakage when f = 1 MHz, 1 V[p-p], 60 50 dBYS = 5 V

Spot killer operation V SPK V9 at which spot killer turns on by 7.3 7.7 8.0 Vdecreasing V 9 from 9 V

Brightness variation with contrast V BAC Pedestal level DC difference between 250 0 250 mVcontrast max. and min.

Brightness variation difference DV BAC R, G, B Out variation voltage 0 20 mVvoltage with contrast difference

Color /B&W DC difference voltage DV CBW Pedestal level voltage difference 60 0 60 mVbetween with and without burst signal

Pedestal level fluctuation with V CC DV PL/V VCC1 = 9 V (allowance: 10%) 0 200 400 mV/V

Pedestal level-temperature characteristics DV PL/T Ta = 20C to +70C 0.6 mV/ C

Pedestal level difference voltage DV PD/V VCC1 = 9 V (allowance: 10%) 0 mV/Vfluctuation with V CC RG, B G

External RGB output blanking voltage V BLK Burst input only 0.8 1.3 1.8 V

RGB limiter control range 1 V BEAM1 Input 2 V[p-p], contrast max. 6.4 6.7 7.0 VRGB limiter 0E = 70

RGB limiter control range 2 V BEAM2 Input 2 V[p-p], contrast max. 5.6 6.0 6.4 VRGB limiter 0E = F0



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ICs for TV AN5165K


Synchronizing signal processing circuit

Horizontal output start voltage V fHS Minimum V 46, when H osc. output is 3.9 4.4 4.9 V1 V[p-p] or more and f O becomes> 10 kHz

Lock detection output voltage 1 V LD1 V11, when horizontal AFC is locked 3.8 4.3 4.8 V

Lock detection output voltage 2 V LD2 V11, when horizontal AFC is unlocked. 0 0.1 0.5 V

Lock detection charge and discharge I LD DC measurement 0.5 0.7 1.1 mAcurrent

EBP (BLK) slice level V FBP Minimum voltage of pin 45, when 0.3 0.66 1.0 Vblanking is applied to RGB output

EBP (AFC2) slice level V FBPH Minimum voltage of pin 45, when 1.45 1.85 2.25 VAFC2 operates

Horizontal AFC H DC measurement 26 33 40 A/ s

Horizontal VCO H curve gradient near f = 15.75 kHz 1.4 1.8 2.2 Hz/mV

Burst gate pulse position P BGP Delay from H SYNC rise 0.2 0.4 0.6 s

Burst gate pulse width W BGPN 2.5 3.0 3.5 s

V blanking pulse width W VN Pulse width, when f H = 15.75 kHz 1.04 1.14 1.24 ms

EBP allowable range T FBP Time from H OUT r ise to FBP center 12 19 s

Overvoltage protective operation V XRAY Dispersion from the minimum voltage 60 60 mVvoltage at which H osc. comes to be out of

synchronization

Black-out operation voltage V BLOUT Difference voltage from hold-down 10 110 160 mVto black out

HSYNC2 output level V SCP HSYNC2 output DC level 8.0 8.2 8.4 V

HSYNC2 output width W SCP HSYNC2 output pulse width 2 s

HSYNC2 output position P SCP The period of time from H SYNC 3 s

center to H SYNC2 riseHorizontal output pulse duty cycle t HO Upward going pulse duty cycle 32 38 44 %

Horizontal output voltage (high) V 50H High level DC voltage 2.8 3.1 3.4 V

Horizontal output voltage (low) V 50L Low level DC voltage 0 0.3 V

Vertical output voltage (high) V 52H High level DC voltage 3.9 4.2 4.5 V

Vertical output voltage (low) V 52L Low level DC voltage 0 0.3 V

Synchronizing signal clamp voltage (Ver.) V39 V39 clamp voltage 3.2 3.6 4.0 V

Synchronizing signal clamp voltage (Hor.) V41 V41 clamp voltage 3.2 3.6 4.0 V

External blanking input threshold level V16I 0.4 0.75 1.1 V

Vertical pull-in range f VP-N f H = 15.75 kHz 56 64 Hz



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AN5165K ICs for TV


I2C interface

Sink current when ACK I ACK Maximum value of sink current 1.8 2.5 5.0 mAfor pin 14 at ACK

Bus free before start t BUF 4.0 s

Start condition set-up time t SU, STA 4.0 s

Start condition hold time t HD, STA 4.0 s

Low period SCL,SDA t LOW 4.0 s

High period SCL t HIGH 4.0 s

Rise time SCL,SDA tR

1.0 s

Fall time SCL,SDA t F 0.35 s

Data set-up time(write) t SU, DAT 0.25 s

Data hold time(write) t HD, DAT 0 s

Acknowledge set-up time t SU, ACK 3.5 s

Acknowledge hold time t HD, ACK 0 s

Stop condition set-up time t SU, STO 4.0 s

DAC

3, 4, 5, 6, 7-bit DAC DNLE L 3, 4, 5, 6, 7 1LSB = {Data (max.) Data (00) } 0.1 1.0 1.9 LSB /7, 15, 31, 63, 127 Step

8-bit DAC DNLE L 8 1LSB = {Data (FF) Data (00) } /255 0.1 1.0 1.9 LSBStep

Cut-Off DAC overlap D STEP Overlap of 8-bit 2-stage changeover 27 32 37 Stepof R, B cut-off (Same for AFT)

Standard conditions when testing1. Input signal

1) VIF : f P = 45.75 MHz, V IN = 90 dB , at video modulation: Modulation signal is 10-staircaseModulation m = 87.5 %, pin 19 input level 84 dB when V IN = 90 dB

2) SIF : f S = 4.5 MHz, V IN = 90 dB , modulation signal f M = 400 Hz, deviation: NTSC 25 kHz3) Video :10-staircase 2 V[p-p] (V BW = 1.43 V[0-p])4) Chroma : Color bar signal: Burst level 300 mV[p-p]

Rainbow signal :Burst level 300 mV[p-p]5) Sync. signal: Video signal 1.5 V[p-p] to 2.5 V[p-p] for both horizontal and vertical sync. signal input



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AN5165K ICs for TV

Terminal Equivalent Circuits (continued)

H Outpin 50

HSYNC Inpin 41

Pin No. Equivalent circuit Description I/O

4 External R input pin AC5 External G input pin (Pulse)6 External B input pin

External input pin for OSD Output linearly changes according to

input level Recommended use range: 0 V to 6 V

7 VCC1-1 (typ.9 V) DC Video circuit 9 V Chroma circuit RGB circuit Sync. circuit DAC circuit

8 R Out pin AC9 G Out pin

10 B Out pin BLK level approx. 1.5 V Black (Pedestal) level approx. 3.0 V Recommended use range: 2.4 mA to

+4.8 mA

11 Horizontal sync. detection pin DC Phase of horizontal synchronizing signal when

and horizontal output pulse are detected synchronizedand outputted 4.5 V

Pin 11 becomes low at out of whensynchronization asynchronous

Color control becomes min. and chroma 0.1 Voutput disappears and V OUT goes into free-running state in a asynchronous condition

Pay attention to impedance when pin 11

voltage is used for microcomputer(ZO 680 k required)

HSYNC period, when pin 50at high: I 1 ONat low: I 2 ON

12 GND DC RGB circuit DAC. I 2C circuit VIF (VCO) circuit

5.0 V

0

50 A

8 A

I1

I2

800 A

800 A

10 k

12 k

toChromaCircuit

2.8 V

3.7 V

12 k

270

5 V(VCC2-2 )

0.082 F ZO680 k

ZO11

50

9 V (V CC1-1 )

100 A

100 A

Pin 89

10

5.0 V0

from-COM

200

50 k

50 k

to RGB OutputCircuit

pin4, 5, 6

9 V (V CC1-1 )

50 A

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ICs for TV AN5165K



13 ACL/ABL pin DC RGB output is blacked out when DC voltage approx. 3.5 V

of pin 13 is decreased from the outside.

However, it is not blacked out when serviceswitch has been turned on.(Service switch priority)

When 01 D7= 1, ABL functions, and brightnessdecreases by lowering DC voltage of pin 13

When pin 13 is grounded, ACC gain becomesmin. and it is possible to measure chromafree-running frequency. Measuring point ispin 51.

Recommended use range: 0 V to V CC1

14 I 2C BUS Data input pin AC Input low level: 0.9 V or less (Pulse) Input high level: 3.1 V or more ACK sink capability: 1.8 mA Recommended use range: 0 V to V CC2

15 I 2C clock input pin AC Input low level: 0.9 V or less (Pulse) Input high level: 3.1 V or more Recommended use range: 0 V to V CC2

16 External blanking input pin AC RGB out blanking is applied when a voltage (Pulse)

of 0.8 V or more is applied HSCP pulse output pin

Horizontally synchronized 2 s pulse isoutputted.

Recommended use range: 0.8 mA to0.2 mA, 0 V to 5.0 V

2.7 k

100

Data 1414

1 k

30 k

to LogicCircuitACK

51 k

10 k

30 k

5 V(VCC2-2 )5 V

3.25 V

2 k

20 A 50 A

from-com

2.7 k

100

Clock 15

1 k

30 k

to LogicCircuitACK

51 k

10 k

30 k

5 V(VCC2-2 )5 V

3.25 V

2 k

20 A 50 A

from-com

10 k

H Sync.2

100 k 40 k

5.6 k

3.9 k 16

270 2.7 k

10 k 9 V

(VCC1-1 )50 A50 A

0.7 V 8.2 V

5 V

0 V

9 V(VCC1-1 )

60 k 60 k

2.7 V

5.9 V

2.7 V

6.9 k

7.1 k

Neck

ABL7.1 k

140k

6.9 k

6.9 k

5 k

13

When neck protect time high

5.0 V

0

5.0 V

0

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AN5165K ICs for TV



17 White Peak Detect Filter input pin DC White gradation correction response

characteristic is determined.

When there is screen sag, make C largerWhen screen response is slow, makeCsmaller

18 VCC2-1 (typ.5 V) DC VIF, SIF circuit 5 V

19 VIF input pin 1 AC20 VIF input pin 2 f = f

PVIF amp. input with balanced input DC level Input max.120 dB approx. 2.7 V

Input resistance: 1.2 k (45.75 MHz)Input capacitance: 4.0 pF (45.75 MHz)

21 GND DC

For VIF and SIF circuit22 RF AGC output pin DC

Collector open output Recommended use range: 0 V to V CC1 (9 V)

Maximum sink current min.: 1.5 mA

23 SIF APC filter pin DCFilter pin for APC circuit of SIF. approx. 2.5 V Deemphasis characteristic is changeable

by the capacitor between pin and GND

17

9 V

9 V(VCC1-1 )

20 A

270

6 k

YOUT

375 50 k

10 A

50 A

40 A

4.7 F

40 A

5 V(VCC2-1 )

27 k 1.2 k

3.5 V

SAW

1.2 k

150 A

0.022 F

0.68 H

150 A

20

19

5 V(VCC2-1 )

IF AGCBias

RF AGCControl

Bias

22

100 A

1 k 1 k

270

40 k

6 k 3 k

33 k

to Tuner

10 k

23

9 V(VCC1-2 )

12.2 k 7.5 k

57 k 270

1.5 V875

100 pF4 pF

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ICs for TV AN5165K



24 Audio output pin AC DC fluctuates by internal/external changeover 0 kHz to 20 kHz Recommended use range: 0.8 mA to DC

+ 0.8 mA approx. 3.9 V

25 External video input pin AC Input pin for external video signal and DC 1 V[p-p]

cut input (Composite) Typical: 1 V[p-p] (max. 1.5 V[p-p]) ZO is 100 or less

DCapprox. 1.6 V

26 Decoupling pin DC S-curve in IC is wideband, but DC feedback is

applied so that DC voltage of output signalbecomes constant.

DC level (typ. 4.5 V), f Shigh: V 26low If C (4.7 F) is too small, sound distortion

tends to become larger at low frequency.

27 External audio input pin AC Input pin for external audio signal. DC cut 0 kHz to 20 kHz

input. Adjust typical input level to internal sound

level. Input max. 7 V[p-p]

28 SIF signal input pin AC Input max. 110 dB f = f SBlooming DC adjusting pinWhite gradation correction curve and bias DC

to determine absolute clip point are provided. approx. 2.3 V(2.0 V to 4.5 V)

Recommended use range: 0 V to V CC1 (9 V)

24

800 A150 A

9 V(VCC1-2 )

270

9 V(VCC1-1 )

(VCC1-2 )Int. Video

toVideo SW

50 A50 A

1.6 V

7 A

4.7 F

500 ZO

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AN5165K ICs for TV



29 IF AGC filter pin DC Pin for IF AGC filter. The current obtained approx. 2 V

from peak AGC circuit is smoothed by

external capacitor. Since response becomes faster when C goes

smaller, hum characteristic will be improved.However, sag tends to appear easily.

30 Video output pin AC INT.Video or EXT.Video selected by AV 2 V[p-p]

SW is outputted. Recommended use range 3.2 mA to

+0.4 mA DC levelapprox. 4.2 V

31 AFT output pin DC Offset of center voltage is adjusted by bus When AFT defeat SW is turned on (0B = 00),

V31 becomes a value determined by externalresistance-divider.

of AFT is variable by impedance of externally attached resistor.

32 Internal video input pin AC Input pin for signal detected by VIF circuit 1 V[p-p]

(Internal video signal). (Composite) DC cut inputTypical input: 1 V[p-p] (max. 1.5 V[p-p])ZO 280

DC levelapprox. 1.6 V

33 VIF detection output pin AC Adjusted to center value by I 2C bus approx.

(Using upper 4-bit of 0 A) 2.1 V[p-p]DC voltage becomes approx. 1 V atexternal video mode (04 D6 = 1)Recommended use range: 1.6 mA to+ 0.8 mA

30

500

400 A

50

9 V(VCC1-2 )

100 A

9 V(VCC1-2 )

1.1 k

1.1 k

40 k 1.1 k

1.1 k

max. 350 F

to Tuner

33 k

33 k

9 V

31270

0.01 F

9 V(VCC1-1 )

(VCC1-2 )Int. Video

toVideo SW

50 A50 A

1.6 V

7 A

4.7 F

500 ZO

32

3350

9 V(VCC1-2 )

150 A

800 A

270 270

29

0.47 F

5 V(VCC2-1 )

to IF Amp.

30 A

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34 APC filter pin DC Filter pin for VIF APC circuit. approx. 2.5 V Lock detection circuit for VCO is built

in the IC inside to changeover the timeconstant for APC filter.

35 VIF oscillation pin AC36 Oscillation coil is changed according to approx.

VIF frequency. 0.3 V[p-p]Allowable value of dispersion for coil DC level

resonance point is within 1%. approx. 3.9 V

37 VCC1-2 (typ.9 V) DC

IF circuit 9 V38 Black level detection pin DC

Black level detection pin for black extension approx. 5.1 Vcircuit

The most black Y-level except for blankingcircuit is held.Black detection sensitivity drops whenZO is made smaller, so that black detectionbecomes impossible unless a large black area.

39 Vertical sync. separation input pin ACVideo input pin 2.0 V[p-p] Video signal input pin

(Also composite video input) Typical input: 2.0 V[p-p] Sync. Top is clamped at 3.5 V Video signal should be inputted at low

impedance. (under 100 )

5 V(VCC2-1 )

3.25 V34

75 A

50 A

SW

1 0

0 . 4

7

F

25 A

270 500

2 2 0 p

F t o 1 8 0 0 p

F

10 k

75

toVOC

5 V(VCC2-1 )

1 200 A

1.5 k 1.5 k

1 200 A 300 A 300 A

2.5V

35 36

9 V (V CC1-1 )

2.5k 2.5 k 2.5 k

Y

100 A 50 A

4.7 F10 k

18 pF

6.6 k

270

38

ZO

6.6 k

9 V(VCC1-1 )

16 k

8 A

3.5 V

16 k

10 A60 pF470 pF

50 A

2.2 F39

2.4 k

220 k

Video5 V

411 k 0.015 F

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AN5165K ICs for TV



40 Vertical synchronizing signal clamp pin AC Peak clamp pin for separating vertical sync. f = f V

signal.

Integral amount of vertical sync signalitself has been determined by internal timeconstant. However, trigger application timingis determined by the selection of externalconstant C1.

41 Horizontal sync separation input pin AC Internal circuit of pin 39 and 41 are the same. 2 V[p-p] When R large, slice level becomes deeper

(Weak to Sync compression). When R small, slice level becomes shallower(Weak to fluctuation such as Ver. Sag).

Sync. Top is clamped at 3.5 V.

42 VCC2-2 (typ.5 V) DCFor chroma, jungle circuit 5 V

43 Chroma signal input pin AC +DCBlack extension start point adjusting pin Burst typ. Pin 43 is chroma signal input pin, and black 300 mV[p-p]

extension start point is adjusted by externally

applied DC voltage. DC typ.DC level: high low 4.5 VStart point: Shallow DeepBlack extension effect: Small Large


44 GND DC For video, chroma, jungle circuit 0 V

45 FBP input pin ACFBP input pin for horizontal blanking and FBP

AFC circuit Threshold level

HBLK: 0.7 VAFC: 1.9 V

A voltage input of 0 V or less is inhibited. Recommended use range: 0 V to V CC2 (5 V)

46 Horizontal stabilized power supply pin. DC6.2 V

5 V(VCC2-2 )

29

C1 2202.2 F

4 A

30 k 3 k

50 k 270

200

10 k

10 k

4.3 V

to Ver.Count Down

9 V (V CC1-1 )

39 k

39 k

25 A

60 pF68 pF

100 A

128 k 100 A

Blstart

Chromaattenuatorcircuit

Black extension DC

200

270

43

5 V (V CC2-2 )

toHBLK

50 A

100 A

100 A 50 A

50 A

toAFC

40 k

60 k

24 k

1.9 V

0.7 V

2.7 k

2.7 k 270

100 k

45

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ICs for TV AN5165K


47 Horizontal AFC1 filter pin DC The capacitor connected to pin 47 is charged typ. 4.3 V

and discharged after comparing the phase

of horizontal synchronizing signal and pulseinside the IC.

R1, R2, C1 and C2 are lag lead filter forAFC1.

48 Horizontal oscillation pin AC Oscillation takes place at 32 f H 503 kHz f = 32 f H

by ceramic oscillator. (approx. Horizontal and vertical pulse are generated 500 kHz)

by count-down circuit inside the IC.

49 Overvoltage protection input pin DCIf increasing input pin voltage from 0 V Normally

at V REF (pin 46) = 6.2 V; 0 V(1) Horizontal oscillation come to be out

of synchronization: approx. 6.15 V(2) Blacked out: (1) +70 mV


50 Horizontal pulse output pin AC Duty cycle approx. 37% Pulse

Recommended use range: 6.4 mA to+0.1 mA

47

C2

200 AC1

1 F

1 000 A

Hor. Sync. Hor.OSC

0.033 F

27 k 27 k

1.8 k R2

R1AFC1Detecter

1.5 V

4.3 V6.2 V(VCC3 )

Horizontal curve

f H

V53

200 A

100 A

be used ( 750 ppm/ C)220 pF: Temperature characteristic product should

80 A

6.2 V(VCC3 )

10 k 10 k

22 k

300

48

100 A

VCC348.3 k

20 k

1 k

1 k 49

46

9 V(VCC1-1 )

50

10 k 50

6.2 V(VCC3 )

40 k

Hor. Out

3.5 V

0 V

19 k 4.3 V

0

3.5 V


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AN5165K ICs for TV


51 CW output pin / input pin for spot killer off. AC(Output amplitude 860 mV[p-p]) Approx.The pin also shares in Hold-down detection. 830 mV[p-p]

At normal: 6.1 V (DC) At hold-down: 1.2 V (DC) Apply 9 V(V CC1 ) DC to turn off spot killer. f = 3.58 MHz

Recommended use range: 0.4 mA to+ 0.1 mA0 V to V CC1

52 Vertical pulse output pin ACNegative polarity, pulse width 6.25 H Pulse Recommended use range: 0.8 mA to+ 0.1 mA

9 V (V CC1-1 )

50 A15 pF

51

100 AHold

320 k

10 k

30 k

30 k 80 k

To spotkillercircuit

270

596 k

44 k

52

50 k

43 k

5 V(VCC2-2 )

0

4.2 V

0

4.2 V


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