Benchmark Testing chvdc2 Relative to Proposed PDCI

Parameters from BPA

WECC MVS Meeting8/27/20

P. Pourbeik

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Acknowledgement

• Collective work of sub-group of the ATSMWG– Juan Sanchez-Gasca, GE– Jay Senthil, Siemens PTI– Jamie Weber, PowerWorld– Pouya Zadkhast, PowerTech Labs – Daniel Hauge, BPA– Sergey Pustovit, BPA– Pouyan Pourbeik, PEACE®

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BACKGROUND

• chvdc2 model was developed back in 2015• Was implemented by all four (4) major software

vendors back in 2018, and benchmark tested on a simple CIGRE benchmark case

• Did not benchmark test the “commutation failure” emulation

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BACKGROUND

• BPA developed a simple micro-WECC case• Parameterized chvdc2 to represent PDCI, by

comparing with the OEM user-written model• A discrepancy was seen relative to the

“commutation failure” emulation.• We had several conference calls and rounds of

simulations across the parties in July/August and a few small bugs were found in the tools

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New Results

• Micro-WECC case• PDCI modeled with BPA parameterized chvdc2

model• Two faults:

– 100 ms 3-phase fault at rectifier AC bus– 100 ms 3-phase fault at inverter AC bus

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Rectifier Fault

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Rectifier Fault

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Rectifier Fault

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Inverter Fault

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Inverter Fault

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Inverter Fault

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CONCLUSION

• There was a small bug in each tool:– GE PSLF, had a small bug relative to the gamma_cf parameter (commutation failure

emulation), this is already fixed in version 21.08.1 (July 2020 release)– PowerWorld, TSAT and PSS®E had a small bug around the RAML function, which is

fixed and will be in the next release of the tools– PSS®E also had a very minor issue around internal model integration time-step

relative to the DC line dynamics, this is now consistent with the other tools.• Note, that there are some known differences between the programs which are unavoidable

and explain some of the minor differences in the solutions:– There are some differences in the way losses are modeled in the algebraic LCC

converter equations across the tools– For the DC line dynamics the internal model integration time step is n/10 in TSAT,

PSS®E and PowerWorld, it is n/20 in GE PSLFTM

– There may be subtle differences to how (numerically) a 3-phase fault admittance is modeled in each tool

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NEXT STEPS

• BPA to test chvdc2 against user-written OEM code for PDCI with the new release of GE PSLF (with the bug fix)

• BPA/PacifiCorp to run some stress case simulations with the parameterized PDCI model using chvdc2 in a full WECC case to ensure model behaves well in the full WECC case

• Then release the new parameterized chvdc2 PDCI model to WECC for use in WECC planning cases

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Questions

• Any questions or comments?

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