A New Approach to Determine the Start-up Time of Sinusoidal Oscillators

Burkhard Voigt, Dirk Seefeldt and Ernst-Helmut Horneber

Institut fuer Netzwerktheorie und Schaltungstechnik, Technische Universitaet Braunschweig, Langer Kamp 19c, 38106 Braunschweig, Germany, Tel.: (49)-531-391-3171 (Fax: -8189)

Abstract A transient waveform leaving the metastabile equi- librium of a flipflop exhibits a very similar shape like the rising amplitude of a LC-oscillator in the start-up phase. This correspondence is used to develop a new approach to determine the start-up behavior of nearly sinusoidal oscillators

1 Equivalence Flipflop Oscillator Consider the simple CMOS flipflop shown in fig. 3 where all dynamic efffects have been described by a single ca- pacitor C. Starting from various initial conditions near the metastabile equilibrium v D D / : ! in fig. 1 a couple of transient curves have been plotted.

. . .

. . .

............ . . . . . . .

.........._._

............. ................. ....................................... ................. L . . .

................... .................

t 0.0 2.0 4.0 6.0 8.0 - P

Fig. 1. Flipflop leaving the equilibrium v D 0 / 2

-v V 5.0

2.5

0.0

. . . .. . . . . . . - i a . . .

0.0 2.0 4.0 6.0

Fig. 2. Oscillator in the start-up phase

The current work is part of the joint project ”model-library for complex analog devices” supported by the german ministry of research and technologies (BMFT), grant 13MV0039. The authors are responsible for the content of the paper.

These curves have very similar shapes to the envelopes of sinusoidal oscillators in the start-up phase (fig. 2). This observation leads to the following conjectures:

1. Flipflops and oscillators are both trigger circuits

2. Simulations with programs like SPICE will be char- acterised by similar numerical behavior and, hence, will come up with similar problems

3. A modeling approach based on equivalent types of differential equations will lead to similar analytic re- sults

2 Analytic Flipflop Model All nonlinearities of the flipflop in Fig. 3 are lumped in the i ( v ) characteristic. A simple but qualitatively correct approximation is given by the polynomial

I 4” ,3”” L H i I

Fig. 3. CMOS-flipflop circuit

“ t mA

?I

0.0 1.0 2.0 3.0 4.0 0 Fig. 4. i(v) characteristic of the flipflop in fig. 3

0-7803-2428-5195 $4.00 0 1995 IEEE 1119

Together with the equation for the state variable v( t )

the differential equation is found

c % k [ ( y ) z ( ' U - x y ) dt - (v-!y)3]. (3)

From this we obtain the transient voltage

T

(4) VDD 1

v(t) = - f k/ 2 2

as the solution of the initial problem with the initial con- dition v(t = 0) = 'UO. The constant t o characterizes the instant of rising and is given by

(5) Fig. 5. State variables at capacitor

with a linear increasing amplitude

C 2 k ( y)2 '

ai0

2 c a,( t ) = - 4 3 State Variables of Flipflops and

Oscillators By differentiation we get

Next, a corresponding model for a general analysis of os- cillators shall be deduced. For flipflops, the voltage across the capacitor C has been chosen as state variable. For oscillators a suitable state variable is found to be the en-

d [a, (t)l 2C . ___ = ai0 dt

This equation has been calculated

and LC-circuit

(11)

with the assumption, velope a,(t) of the sinusoidal voltage across the parallel LC resonant circuit. Fig. 5 compares voltages and cur- rents of both circuits. A constant current i(t) = io flowing into the capacitor results in a linear increasing ramp of the voltage 'U across the capacitor. An equivalent phenomena is exhibited by the LC-circuit. A sinusoidal current

i(t) = ai sinwot (6) of constant amplitude ai = ai0 with the resonant fre- quency of the LC circuit results in a linear increasing ramp of the voltage amplitude across the LC circuit. The reso- nant circuit seems to work as an integrator for the current amplitude. Of course, this assumption can be proofed from a calculation in the Laplace domain that gives

that ai is constant. In good approximation this is still correct if a i ( t ) is not constant and a,( t ) varies nonlinear in time. For example, to get a quadratic increasing voltage

the current must be r 1 1

tsinwot + I (coswot - 1) 2WO

Obvioulsly, the second term is the error term, which be- comes small if 1 / (2wo) is small in relation to the observed time-window. So in general (11) can be written as

1 1(s) (7) 4 Harmonic Balance c s2 + W O 2

V ( s ) = - . s. -

where = l/m is the frequency Of the LC network. The current amplitude is assumed to be constant

results in

The basic structure of an oscillator circuit resonating in parallel mode is given by the network in fig. 6. The

i(t), which is feeding the parallel LC-circuit. The follow-

currents i sorrrce( t ) and i ( t ) :

ai ( t> = 'io and its Lap1ace transform together with (7) nonlinear current Source iJOuTCe(t) is equal to the current

aiowo S ing approach is based on a harmonic balance of the two

(15)

(8)

In the time domain this corresponds to a sinusoidal voltage

v ( t ) = - . t . sin(w0t) (9)

V ( s ) = -. c (s2 +wo2)2 ' -

~ s o u r c e ( t ) = i ( t ) ai0

2 c By definition these two currents both are stated to be sinu- soidal a t each discrete point of time. Therefore a Fourier

1120

separation of each of the two currents must be possible in each discrete point of time. The current iJOurce is con- trolled by the voltage v across the LC circuit. In the case of the well known VAN DER POL oscillator the current iSOurce is given by the polynomial

isouree = -EC [ i . 3 - .I (16)

where the parameter E is used as a scaling factor. In agree- ment to the above conclusions the voltage v ( t ) is assumed to be sinusoidal with a linear or nonlinear time variant amplitude a, ( t ) :

w ( t ) = a.(t) . sinwot (17) Substituting in (16) gives

1 a 12

3 iSoufCe = --EC [ ( y - a u ) sin wot - _~f. sin 3wot .

(18) By postulation the current i ( t ) is sinusoidal

i ( t ) = a ; ( t ) . sin wot (19) therefore from (14) follows

Next the two currents are balanced in respect to (15) :

At each discrete time instant t the amplitude a,, and its differential are constant values. So both sides of the equa- tion can be compared in respect to sin wot . It follows that

i,,uT-ct? 0) i 0)

Fig. 6. Basic network structure of oscillator circuits

0

-2 _$

0.0 2.0 4.0 6.0 8.0 10.0 t - P S

Fig. 7. Strongly increasing amplitude of a VAN DER POL oscillator ( L = ; E = 5 . lo6) , c = 1 0 - ~ , a,,o =

(23)

This differential equation is well known from analyses of VAN DER POL oscillators. Its simple analytic soluLion can been found in textbooks and shall not considered here. However, it should be mentioned that this equation is a correct discription of the physical reality as far as a,( t ) varies linearly with time (including large linear variances) and furthermore is widely correct if the nonlinear varia- tions are not too large within one period [2]. To document this the SPICE simulation result and the analytic solution of (23) are plotted in fig. 7.

5 CMOS Crystal Oscillator This approach is suitable to analyze the amplitude versus time behavior of nearly every harmonic oscillator resonat- ing in the parallel or seriell mode. It is not necessarily limited to small absolute values or slowly changing ampli- tudes. As example, an analysis of the start-up behavior of the 4MH.z CMOS quarz oscillator [I] in fig. 8 becomes feasible in contrast to a common transient analysis that is shown in fig. 9. In spite of an enormous consumption of simulation time and memory the SPICE simulation of the startup phase has not yet settled even after 800 periods. As alternative approach the time discret harmonic balance is particularly suitable to analyse the oscillator after the first periods when the circuit has biased (t = 70ps).

Fig. 8. CMOS crystal oscillator [l] (e,. = 8.63fF, C, = 4 p F , L = 0.184H, R, = 24Q, Cl12 = 3 0 p F )

. - . _ . . . . yq 5 3 > ./ ........ .>\..! ; .................... ; ..................... i. .............. : . - . - ,:

20 :

t I P S Fig. 9. CMOS crystal oscillator, starting-up behavior

1121

The circuit is resonating in the parallel mode and the res- onance capacitance C is given by

The state variable is the voltage amplitude a, across the inductor L . This parallel resonant circuit is fed by the output current i of the inverter (the influence of &ias and Rr can be neglected a t a frequency of 4 M H z ) . Analysis in the frequency domain gives the relation between this feeding current and the voltage across the inductor

which is equivalent to (7). Therefore, the differential for the state variable must be equivalent to (14):

To obtain the complete differential equation of the state variable a, the relation ai(a,) must be calculated. Assum- ing the CMOS inverter to be biased a t I& = Voul = 2.5V the output current ai is a function of the crystal voltage vq only. Neglecting Rr gives the relation between the am- plitude a, and the crystal voltage amplitude aUq as

r* rl

b r - or avq = a, . (27) br V&) = - V(s) c:, - (2 -

To determine the nonlinearities of the circuit the biased inverter is stimulated by sinusoidal voltages with ampli- tudes as parameters (auq = 1V to 6V), see fig. 10. For small input voltage amplitudes (auq < 2V) the output cur- rent amplitude ai is sinusoidal, too. With growing values of aUq distortions occure in the current signal.

1.5 i t mA

0

-1.5

250 300 350 400 450 + t

n s - Fig. 10. Graph of i(t) for auP = 1V to GV

I r , , , I , , I O I I

6 - avq 7

0 2 4

Fig. 11. Graph of the function a r ( u U q )

When a,,* reaches the VDD = 5V range and the input protection diodes become effective, the wg wave goes down to zero or becomes negative. Fig. 11 shows the graph of the a i ( a U q ) relation. A possible approximation is

auq(auq - auqoo) (28) U i ( U ) = -- a,2q53

4 In UP

with IO = 1.5mA and aVqm = 6V. The maximum current Io is in direct relation to the size of the MOS transistors. Substituting (28) in (26) with the use of a,/aUq = aUoo/auqoo = Ci/Cr = 2202 gives the differ- ential equation

With an initial value avo = a v ( t = 0) the solution is

1 a,(t> = auoo . (30)

1 + exp (-t+)

The time constant

depends on the circuit parameters and determines the slope of the suddenly rising amplitude. With a,o = a, (t = 70ps) = 13mV (fig. 9) the second time constant is

(32) avoo - a u o

t 0 . 5 = T, . ln [ ] = 4 8 7 ~ s

which characterizes the instant where the amplitude reaches half of the final value aVW. This time which can be interpreted as the start-up time of the oscillator and is the most important result of the analysis. For oscillators with poor start-up behavior this time can reach unacceptable values if the circuit started from small initial values.

6 Conclusions Based on a state analysis of flipflops a method has been developed for the analysis of LC oscillators. An expres- sion for the important start-up time of CMOS crystal os- cillators has been derived. Application to the well known VAN DER POL oscillator shows that this approach is not limited to small absolute or slowly changing values of am- plitudes.

[l] Rusznyiak, A . : Start-up time of CMOS oscillators; IEEE Transactions on Circuits and Systems, Vol. CAS-34, No. 3 , March 1987, page 259 to 268.

[ 2 ] Mathis, W. ; Voigt, B.: Applications of Lie Series Averaging in Nonlinear Oscillation, Transactions of the IEEE International Symposium on Circuits and Systems, Philadelphia, USA 1987, Vol. 3 , page 911 to 914.

1122