Sansei 6100 - rainers-elektronikpage.de · Bei der Stellung RF (Radiofrequency = HF) gelangt das Eingangssignal über den ... In der Schalterstellung 1 wird in der oberen Ebene das

Signalverfolger

SANSEI

6100

Diese Unterlagen wurden aus der Schaltung des Gerätes erstellt. Trotz sorgfältiger Kontrolle können Schaltungsfeh-ler vorhanden sein. Hierfür übernehme ich keine Gewähr. Jegliche gewerbliche Nutzung oder Weitergabe an Dritte ist untersagt. © Dipl. – Ing. H. R. Fredel – 2011

Download v. www.rainers-elektronikpage.de

Signalverfolger SANSEI 6100 Allgemeines Diese Signalverfolger wurden von der SANSEI Electronics Corporation, Tokio ge-baut. Das Gerät ist in einem Kunststoffpultgehäuse mit ALU – Frontplatte aufgebaut. Zur Stromversorgung dient eine 9V – Blockbatterie oder ein externes Netzteil. Ver-stärker und Tongenerator werden getrennt über den Lautstärkeregler bzw. über den Regler für die Ausgangsspannung eingeschaltet. Der Betriebszustand wird jeweils über eine LED – Anzeige angezeigt. Die Eingangsschaltung

Über die Eingangsbuchse gelangt das Eingangssignal auf den zweipoligen Umschal-ter S1. In der Stellung AF (Audiofrequency = NF) gelangt das Eingangssignal über R14 an den Bereichsschalter SW1. Bei der Stellung RF (Radiofrequency = HF) gelangt das Eingangssignal über den Koppelkondensator C17 an die Detektordiode D9. Mit dem Kondensator C16 wird das Trägersignal ausgefiltert und das Signal R14 zugeführt. Der Bereichswahlschalter besitzt zwei Ebenen mit je vier Stellungen. In der Stellung 0dB wird über die die zweite Ebene der Widerstand R15 gegen Masse geschaltet. Damit beträgt der Eingangswiderstand ca. 270k. In den anderen Schalterstellungen bestimmt R14 den Eingangswiderstand mit 100k. Die Spannungsteilung erfolgt in 20dB Schritten als im Verhältnis 1:10. Die Dioden D und D3 dienen als Schutzdioden. D klemmen die negative Halbwelle der Eingangsspannung auf die ihre Durchlassspannung von ca. 0,6V und D3 auf die Betriebsspannung.


Über C gelangt das Eingangssignal an den Darlington – Emitterfolger Q3 und Q7. Dieser arbeitet in Bootstrapschaltung und hat deshalb einen hohen Eingangswider-stand. Das Ausgangssignal wird niederohmig am Emitter der Transistors Q7 ausgekoppelt und über C5 dem Lautstärkeregler RV1 zugeführt. Vom Schleifer wird über C3 der Eingang Pin 9 des Verstärker – IC IC1 angesteuert. Der Verstärker

Für das IC LA4100 gibt es leider nur ein Datenblatt in japanischer Sprache und Kurzdaten von NTE unter der Bezeichnung NTE1180. Das IC enthält einen kompl. NF – Verstärker mit einer Leistung von max. 1,5W. Die Beschaltung entspricht der vorgeschlagenen Beschaltung des Herstellers. An C13 steht das Ausgangssignal zur Verfügung. Dieses Ausgangssignal wird zum Einen dem Anpassungstrafo TR1 und damit der Buchse „OUTPUT“ zugeführt. Hier steht das Signal zu Messzwecken und zur Weiter-verarbeitung an externen Geräten zur Verfügung. Desweiteren gelangt das Aus-gangssignal an die beiden Mittelkontakte des Vierfachstufenschalters SW2. In der Schalterstellung 1 wird in der oberen Ebene das Signal auf die Buchse Ext. Speaker geschaltet, der Kontakt der unteren Ebene ist nicht belegt. Bei Schalterstellung 2 und 3 der oberen Ebene liegt der eingebaute Lautsprecher am Ausgangssignal. In der unteren Ebene ist Stellung 2 nicht belegt und in Stellung 3 wird das Ausgangssignal gleichzeitig dem Messgleichrichter und damit dem Messin-strument zugeführt. Schalterstellung 4 der oberen Ebene schaltet statt dem Lautsprecher einen Ersatzwi-derstand von 8 an Masse. Auf der unteren Ebene liegt wieder der Messgleichrichter mit dem Messinstrument am Ausgangssignal.


Die Diodenbrücke D5 – D8 bilden mit dem Vorwiderstand RV5 und dem Messinstru-ment M den Anzeigekreis. Das Messinstrument ist mit einer VU – Skala versehen. Der Injektor (Tongenerator)

Der Tongenerator besteht aus einem CMOS – IC mit sechs Invertern. Die Inverter 1 und 6 sind mit den Bauteilen R7, R12, R17, D1 und C18 als astabiler Multivibrator geschaltet. Inverter 5 arbeitet als Puffer für den Oszillator. Die beiden parallel ge-schalteten Inverter 3 und 4 arbeiten als Verstärker für den Ausgang, da CMOS – ICs keinen großen Ausgangsstrom liefern können. Mit dem Regler RV2 wird die Ausgangsamplitude eingestellt. Q1 arbeitet als Emitter-folger und damit als Impedanzwandler. Am Widerstand R8 wird das Ausgangssignal abgegriffen und über C19 der Ausgangsbuchse gleichstromfrei zugeführt. Es handelt sich dabei um ein Rechtecksignal.


Die Stromversorgung

Die Stromversorgung erfolgt entweder von einer eingebauten 9V – Blockbatterie oder über die Schaltbuchse P1 von einem externen Netzteil. Mit dem Schalter S1, der gekoppelt ist mit dem Lautstärkeregler, wird der Verstärker-teil eingeschaltet. Dadurch erhält der Transistor T1 Spannung. Die Spannung am Emitter und damit Ub1 steigt etwas steigt aber etwas langsamer an, da C1 erst auf-geladen werden muss. Die Aufladung ist vom Basisstrom und damit vom Span-nungsabfall an R abhängig. Da auch C12 noch aufgeladen werden muss, wird der Einschaltplopp im Lautsprecher verhindert. Durch die Ladung von C1 wird die Span-nungsänderung am Ausgang auch bei großen Lautstärken fast konstant gehalten. Die Leuchtdiode D10 dient als Betriebskontrolle. Über Schalter S2 wird der Tongenerator eingeschaltet. Für die Stabilisierung der Spannung Ub2 gilt das Gleiche, wie für Ub1. Nur ist hier der Basiswiderstand größer gewählt und ein nicht so leistungsstarker Transistor, da nicht so viel Strom benötigt wird. Die Leuchtdiode D11 dient als Betriebskontrolle.















NTE1180Integrated Circuit

Audio Power Amplifier, 1.5W

Description:

The NTE1180 is a linear integrated circuit with attached heat sink pin. The device is a 1.5W AF poweramplifier. The device is suitable for FM/AM radio, cassette tape recorder, portable player or inter-phone use.

Absolute Maximum Ratings: (TA = +25°C unless otherwise specified)

Supply Voltage, VCC 11V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Power Dissipation, PD 1.2W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating Temperature Range, Topr Ŧ20 to +70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage Temperature Range, Tstg Ŧ40 to +150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Electrical Characteristics: (TA = +25°C, VCC = 7.5V, RL = 4Ω, f = 1kHz unless otherwise specified)

Parameter Symbol Test Conditions Min Typ Max Unit

Circuit Current ICCO Ŧ 15 25 mA

Voltage Gain VG 42 45 48 dB

Output Power PO THD = 10% 0.95 1.5 Ŧ W

Total Harmonic Distortion THD PO = 250mW Ŧ 0.5 1.5 %

Input Resistance Ri 12 20 Ŧ kΩ

Noise Output Voltage VNO Rg = 10k Ŧ Ŧ 3 mV

Rg = 0 Ŧ Ŧ 1.0 mV


Pin Connection Diagram(Front View)

VCC

Audio Input

Ripple Filter Capacitor

Ripple Filter

Output

N.C.Feedback Network

GND

N.C.

Ripple Filter Capacitor

N.C.

Series RC Network

Feedback Network

N.C.

1

2

3

4

5

6

7

14

13

12

11

10

9

8

.099 (2.52)

.082 (2.1) Dia

.100 (2.54) .137 (3.5)

.236 (6.0)

.300(7.62)

.252(6.45)

.265(6.5)

.167(4.26)

.748 (19.0)

1 7

14 8


© Semiconductor Components Industries, LLC, 2006

October, 2006 − Rev. 81 Publication Order Number:

MC14069UB/D

MC14069UB

Hex Inverter

The MC14069UB hex inverter is constructed with MOS P−channel

and N−channel enhancement mode devices in a single monolithic

structure. These inverters find primary use where low power

dissipation and/or high noise immunity is desired. Each of the six

inverters is a single stage to minimize propagation delays.

Features

• Supply Voltage Range = 3.0 Vdc to 18 Vdc

• Capable of Driving Two Low−Power TTL Loads or One Low−Power

Schottky TTL Load Over the Rated Temperature Range

• Triple Diode Protection on All Inputs

• Pin−for−Pin Replacement for CD4069UB

• Meets JEDEC UB Specifications

• Pb−Free Packages are Available

MAXIMUM RATINGS (Voltages Referenced to VSS)

Symbol Parameter Value Unit

VDD DC Supply Voltage Range −0.5 to +18.0 V

Vin, Vout Input or Output Voltage Range(DC or Transient)

−0.5 to VDD + 0.5 V

Iin, Iout Input or Output Current(DC or Transient) per Pin

±10 mA

PD Power Dissipation, per Package(Note 1)

500 mW

TA Ambient Temperature Range −55 to +125 °C

Tstg Storage Temperature Range −65 to +150 °C

TL Lead Temperature(8−Second Soldering)

260 °C

Stresses exceeding Maximum Ratings may damage the device. MaximumRatings are stress ratings only. Functional operation above the RecommendedOperating Conditions is not implied. Extended exposure to stresses above theRecommended Operating Conditions may affect device reliability.1. Temperature Derating:

Plastic “P and D/DW” Packages: – 7.0 mW/C From 65C To 125C

This device contains protection circuitry to guard against damage due to high

static voltages or electric fields. However, precautions must be taken to avoid

applications of any voltage higher than maximum rated voltages to this

high−impedance circuit. For proper operation, Vin and Vout should be constrained

to the range VSS (Vin or Vout) VDD.

Unused inputs must always be tied to an appropriate logic voltage level

(e.g., either VSS or VDD). Unused outputs must be left open.

MARKING

DIAGRAMS

1

14

PDIP−14

P SUFFIX

CASE 646

MC14069UBCP

AWLYYWWG

SOIC−14

D SUFFIX

CASE 751A

TSSOP−14

DT SUFFIX

CASE 948G

1

14

14069UG

AWLYWW

14069U

ALYW

1

14

A = Assembly Location

WL, L = Wafer Lot

YY, Y = Year

WW, W = Work Week

G or = Pb−Free Package

SOEIAJ−14

F SUFFIX

CASE 965

1

14

MC14069UB

ALYWG

See detailed ordering and shipping information in the package

dimensions section on page 2 of this data sheet.

ORDERING INFORMATION

http://onsemi.com

(Note: Microdot may be in either location)


MC14069UB

http://onsemi.com2

Figure 1. Pin Assignment

11

12

13

14

8

9

105

4

3

2

1

7

6

OUT 5

IN 5

OUT 6

IN 6

VDD

OUT 4

IN 4

OUT 2

IN 2

OUT 1

IN 1

VSS

OUT 3

IN 3

Figure 2. Circuit SchematicFigure 3. Logic Diagram

13

11

9

5

3

1

12

10

8

6

4

2

VDD = PIN 14

VSS = PIN 7

VDD

VSS

OUTPUTINPUT*

*Double diode protection on all inputs not shown

Figure 4. Switching Time Test Circuit and Waveforms

PULSE

GENERATOR

VDD

VSS7

INPUT

OUTPUT

CL

14

20 ns 20 ns

VDD

VSS

VOH

VOL

tTHL tTLH

OUTPUT

INPUT

tPHL tPLH

90%50%10%

90%50%10%

(1/6 of circuit shown)

ORDERING INFORMATION

Device Package Shipping†

MC14069UBCP PDIP−14

25 Units / Tape & Ammo BoxMC14069UBCPG PDIP−14(Pb−Free)

MC14069UBD SOIC−14

55 Units / RailMC14069UBDG SOIC−14(Pb−Free)

MC14069UBDR2 SOIC−14

2500 Units / Tape & Reel

MC14069UBDR2G SOIC−14(Pb−Free)

MC14069UBDTR2 TSSOP−14*

MC14069UBDTR2G TSSOP−14*

MC14069UBFEL SOEIAJ−14

2000 Units / Tape & ReelMC14069UBFELG SOEIAJ−14(Pb−Free)

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel PackagingSpecifications Brochure, BRD8011/D.

*This package is inherently Pb−Free.


MC14069UB

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ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

ELECTRICAL CHARACTERISTICS (Voltages Referenced to VSS)

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Characteristic

ÎÎÎÎÎÎÎÎÎ

Symbo

l

ÎÎÎÎÎÎÎÎÎ

VDD

Vdc

ÎÎÎÎÎÎÎÎÎÎ

− 55C ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

25C ÎÎÎÎÎÎÎÎÎÎ

125C ÎÎÎÎÎÎÎÎÎ

UnitÎÎÎÎÎÎ

MinÎÎÎÎÎÎ

MaxÎÎÎÎÎÎÎÎ

Min ÎÎÎÎÎÎ

Typ (2)ÎÎÎÎÎÎÎÎ

Max ÎÎÎÎÎÎ

MinÎÎÎÎÎÎ

Max

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Output Voltage “0” Level

Vin = VDD

Vin = 0 “1” Level

ÎÎÎÎÎÎÎÎÎ

VOLÎÎÎÎÎÎÎÎÎ

5.0

10

15

ÎÎÎÎÎÎÎÎÎ

−−−

ÎÎÎÎÎÎÎÎÎ

0.05

0.05

0.05

ÎÎÎÎÎÎÎÎÎÎÎÎ

−−−

ÎÎÎÎÎÎÎÎÎ

0

0

0


0.05

0.05

0.05

ÎÎÎÎÎÎÎÎÎ

−−−

ÎÎÎÎÎÎÎÎÎ

0.05

0.05

0.05

ÎÎÎÎÎÎÎÎÎ

Vdc

ÎÎÎÎÎÎÎÎÎ

VOHÎÎÎÎÎÎÎÎÎ

5.0

10

15

ÎÎÎÎÎÎÎÎÎ

4.95

9.95

14.95

ÎÎÎÎÎÎÎÎÎ

−−−


4.95

9.95

14.95

ÎÎÎÎÎÎÎÎÎ

5.0

10

15


−−−

ÎÎÎÎÎÎÎÎÎ

4.95

9.95

14.95

ÎÎÎÎÎÎÎÎÎ

−−−

ÎÎÎÎÎÎÎÎÎ

Vdc

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Input Voltage “0” Level

(VO = 4.5 Vdc)

(VO = 9.0 Vdc)

(VO = 13.5 Vdc)

“1” Level

(VO = 0.5 Vdc)

(VO = 1.0 Vdc)

(VO = 1.5 Vdc)


VIL


5.0

10

15


−−−


1.0

2.0

2.5

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

−−−


2.25

4.50

6.75


1.0

2.0

2.5


−−−


1.0

2.0

2.5


Vdc


VIH


5.0

10

15


4.0

8.0

12.5


−−−


4.0

8.0

12.5


2.75

5.50

8.25


−−−


4.0

8.0

12.5


−−−


Vdc

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Output Drive Current

(VOH = 2.5 Vdc) Source

(VOH = 4.6 Vdc)

(VOH = 9.5 Vdc)

(VOH = 13.5 Vdc)

(VOL = 0.4 Vdc) Sink

(VOL = 0.5 Vdc)

(VOL = 1.5 Vdc)

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

IOH


5.0

5.0

10

15


– 3.0

– 0.64

– 1.6

– 4.2


−−−−

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

– 2.4

– 0.51

– 1.3

– 3.4


– 4.2

– 0.88

– 2.25

– 8.8


−−−−


– 1.7

– 0.36

– 0.9

– 2.4


−−−−


mAdc

ÎÎÎÎÎÎÎÎÎ

IOLÎÎÎÎÎÎÎÎÎ

5.0

10

15

ÎÎÎÎÎÎÎÎÎ

0.64

1.6

4.2

ÎÎÎÎÎÎÎÎÎ

−−−


0.51

1.3

3.4

ÎÎÎÎÎÎÎÎÎ

0.88

2.25

8.8


−−−

ÎÎÎÎÎÎÎÎÎ

0.36

0.9

2.4

ÎÎÎÎÎÎÎÎÎ

−−−

ÎÎÎÎÎÎÎÎÎ

mAdc

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Input CurrentÎÎÎÎÎÎ

IinÎÎÎÎÎÎ

15ÎÎÎÎÎÎ

−ÎÎÎÎÎÎ

± 0.1ÎÎÎÎÎÎÎÎ

−ÎÎÎÎÎÎ±0.00001ÎÎÎÎÎÎÎÎ

± 0.1ÎÎÎÎÎÎ

−ÎÎÎÎÎÎ

± 1.0ÎÎÎÎÎÎ

AdcÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Input Capacitance

(Vin = 0)

ÎÎÎÎÎÎÎÎÎ

Cin

ÎÎÎÎÎÎÎÎÎ

−ÎÎÎÎÎÎÎÎÎ


−ÎÎÎÎÎÎÎÎÎÎÎÎ


5.0ÎÎÎÎÎÎÎÎÎÎÎÎ

7.5ÎÎÎÎÎÎÎÎÎ



pF

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Quiescent Current

(Per Package)

ÎÎÎÎÎÎÎÎÎ

IDDÎÎÎÎÎÎÎÎÎ

5.0

10

15

ÎÎÎÎÎÎÎÎÎ

−−−

ÎÎÎÎÎÎÎÎÎ

0.25

0.5

1.0


−−−

ÎÎÎÎÎÎÎÎÎ

0.0005

0.0010

0.0015


0.25

0.5

1.0

ÎÎÎÎÎÎÎÎÎ

−−−

ÎÎÎÎÎÎÎÎÎ

7.5

15

30

ÎÎÎÎÎÎÎÎÎ

Adc

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Total Supply Current (3) (4)

(Dynamic plus Quiescent,

Per Gate) (CL = 50 pF)


ITÎÎÎÎÎÎÎÎÎÎÎÎ

5.0

10

15

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

IT = (0.3 A/kHz) f + IDD/6

IT = (0.6 A/kHz) f + IDD/6

IT = (0.9 A/kHz) f + IDD/6


Adc

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Output Rise and Fall Times (3)

(CL = 50 pF)

tTLH, tTHL = (1.35 ns/pF) CL + 33 ns




tTLH,

tTHLÎÎÎÎÎÎÎÎÎÎÎÎ

5.0

10

15


−−−


−−−


−−−


100

50

40


200

100

80


−−−


−−−


ns

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Propagation Delay Times (3)

(CL = 50 pF)

tPLH, tPHL = (0.90 ns/pF) CL + 20 ns




tPLH,

tPHL


5.0

10

15


−−−


−−−


−−−


65

40

30


125

75

55


−−−


−−−


ns

2. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.3. The formulas given are for the typical characteristics only at 25C.4. To calculate total supply current at loads other than 50 pF:

IT(CL) = IT(50 pF) + (CL – 50) Vfk

where: IT is in A (per package), CL in pF, V = (VDD – VSS) in volts, f in kHz is input frequency, and k = 0.002.


MC14069UB

http://onsemi.com4

PACKAGE DIMENSIONS

PDIP−14CASE 646−06

ISSUE P

1 7

14 8

B

A DIM MIN MAX MIN MAX

MILLIMETERSINCHES

A 0.715 0.770 18.16 19.56

B 0.240 0.260 6.10 6.60

C 0.145 0.185 3.69 4.69

D 0.015 0.021 0.38 0.53

F 0.040 0.070 1.02 1.78

G 0.100 BSC 2.54 BSC

H 0.052 0.095 1.32 2.41

J 0.008 0.015 0.20 0.38

K 0.115 0.135 2.92 3.43

L

M −−− 10 −−− 10

N 0.015 0.039 0.38 1.01

NOTES:1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.2. CONTROLLING DIMENSION: INCH.3. DIMENSION L TO CENTER OF LEADS WHEN

FORMED PARALLEL.4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.5. ROUNDED CORNERS OPTIONAL.

F

H G DK

C

SEATINGPLANE

N

−T−

14 PL

M0.13 (0.005)

L

M

J0.290 0.310 7.37 7.87


MC14069UB

http://onsemi.com5

SOIC−14CASE 751A−03

ISSUE H

NOTES:1. DIMENSIONING AND TOLERANCING PER

ANSI Y14.5M, 1982.2. CONTROLLING DIMENSION: MILLIMETER.3. DIMENSIONS A AND B DO NOT INCLUDE

MOLD PROTRUSION.4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)

PER SIDE.5. DIMENSION D DOES NOT INCLUDE

DAMBAR PROTRUSION. ALLOWABLEDAMBAR PROTRUSION SHALL BE 0.127(0.005) TOTAL IN EXCESS OF THE DDIMENSION AT MAXIMUM MATERIALCONDITION.

−A−

−B−

G

P 7 PL

14 8

71

M0.25 (0.010) B M

SBM0.25 (0.010) A ST

−T−

FR X 45

SEATINGPLANE

D 14 PL K

C

JM

DIM MIN MAX MIN MAX

INCHESMILLIMETERS

A 8.55 8.75 0.337 0.344

B 3.80 4.00 0.150 0.157

C 1.35 1.75 0.054 0.068

D 0.35 0.49 0.014 0.019

F 0.40 1.25 0.016 0.049

G 1.27 BSC 0.050 BSC

J 0.19 0.25 0.008 0.009

K 0.10 0.25 0.004 0.009

M 0 7 0 7

P 5.80 6.20 0.228 0.244

R 0.25 0.50 0.010 0.019

7.04

14X

0.58

14X

1.52

1.27

DIMENSIONS: MILLIMETERS

1

PITCH

SOLDERING FOOTPRINT*

7X

*For additional information on our Pb−Free strategy and solderingdetails, please download the ON Semiconductor Soldering andMounting Techniques Reference Manual, SOLDERRM/D.


MC14069UB

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PACKAGE DIMENSIONS

TSSOP−14

CASE 948G−01ISSUE B

DIM MIN MAX MIN MAX

INCHESMILLIMETERS

A 4.90 5.10 0.193 0.200

B 4.30 4.50 0.169 0.177

C −−− 1.20 −−− 0.047

D 0.05 0.15 0.002 0.006

F 0.50 0.75 0.020 0.030

G 0.65 BSC 0.026 BSC

H 0.50 0.60 0.020 0.024

J 0.09 0.20 0.004 0.008

J1 0.09 0.16 0.004 0.006

K 0.19 0.30 0.007 0.012

K1 0.19 0.25 0.007 0.010

L 6.40 BSC 0.252 BSC

M 0 8 0 8

NOTES:1. DIMENSIONING AND TOLERANCING PERANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.3. DIMENSION A DOES NOT INCLUDE MOLDFLASH, PROTRUSIONS OR GATE BURRS.MOLD FLASH OR GATE BURRS SHALL NOTEXCEED 0.15 (0.006) PER SIDE.

4. DIMENSION B DOES NOT INCLUDEINTERLEAD FLASH OR PROTRUSION.INTERLEAD FLASH OR PROTRUSION SHALLNOT EXCEED 0.25 (0.010) PER SIDE.

5. DIMENSION K DOES NOT INCLUDEDAMBAR PROTRUSION. ALLOWABLEDAMBAR PROTRUSION SHALL BE 0.08(0.003) TOTAL IN EXCESS OF THE KDIMENSION AT MAXIMUM MATERIALCONDITION.

6. TERMINAL NUMBERS ARE SHOWN FORREFERENCE ONLY.

7. DIMENSION A AND B ARE TO BEDETERMINED AT DATUM PLANE −W−.

SU0.15 (0.006) T

2X L/2

SUM0.10 (0.004) V ST

L−U−

SEATING

PLANE

0.10 (0.004)

−T−

ÇÇÇÇÇÇÇÇÇSECTION N−N

DETAIL E

J J1

K

K1

ÉÉÉÉÉÉ

DETAIL E

F

M

−W−

0.25 (0.010)814

71

PIN 1IDENT.

HG

A

D

C

B

SU0.15 (0.006) T

−V−

14X REFK

N

N

7.06

14X

0.3614X

1.26

0.65

DIMENSIONS: MILLIMETERS

1

PITCH

SOLDERING FOOTPRINT*

*For additional information on our Pb−Free strategy and solderingdetails, please download the ON Semiconductor Soldering andMounting Techniques Reference Manual, SOLDERRM/D.


MC14069UB

http://onsemi.com7

PACKAGE DIMENSIONS

SOEIAJ−14CASE 965−01

ISSUE A

HE

A1

DIM MIN MAX MIN MAX

INCHES

−−− 2.05 −−− 0.081

MILLIMETERS

0.05 0.20 0.002 0.008

0.35 0.50 0.014 0.020

0.10 0.20 0.004 0.008

9.90 10.50 0.390 0.413

5.10 5.45 0.201 0.215

1.27 BSC 0.050 BSC

7.40 8.20 0.291 0.323

0.50 0.85 0.020 0.033

1.10 1.50 0.043 0.059

0

0.70 0.90 0.028 0.035

−−− 1.42 −−− 0.056

A1

HE

Q1

LE

10 0 10

LE

Q1

NOTES:М1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.М2. CONTROLLING DIMENSION: MILLIMETER.М3. DIMENSIONS D AND E DO NOT INCLUDE

MOLD FLASH OR PROTRUSIONS AND AREMEASURED AT THE PARTING LINE. MOLD FLASHOR PROTRUSIONS SHALL NOT EXCEED 0.15(0.006) PER SIDE.

М4. TERMINAL NUMBERS ARE SHOWN FORREFERENCE ONLY.

М5. THE LEAD WIDTH DIMENSION (b) DOES NOTINCLUDE DAMBAR PROTRUSION. ALLOWABLEDAMBAR PROTRUSION SHALL BE 0.08 (0.003)TOTAL IN EXCESS OF THE LEAD WIDTHDIMENSION AT MAXIMUM MATERIAL CONDITION.DAMBAR CANNOT BE LOCATED ON THE LOWERRADIUS OR THE FOOT. MINIMUM SPACEBETWEEN PROTRUSIONS AND ADJACENT LEADTO BE 0.46 ( 0.018).

0.13 (0.005) M 0.10 (0.004)

D

Z

E

1

14 8

7

e A

b

VIEW P

c

L

DETAIL P

M

A

b

c

D

E

e

0.50

M

Z

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