ALL-STANDARD-ALL-BAND POLAR MODULATOR FOR DIGITAL ... · Matsuzawa & Okada Lab. ALL-STANDARD-ALL-BAND POLAR MODULATOR FOR DIGITAL TELEVISION BROADCASTING. Martínez Alonso Abdel

Matsuzawa& Okada Lab.

ALL-STANDARD-ALL-BAND POLAR MODULATOR FOR DIGITAL

TELEVISION BROADCASTING

Martínez Alonso Abdel

Matsuzawa and Okada LaboratoriesTokyo Institute of Technology

2015/12/12

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Outline

• Motivation• TxMER degradation• Direct Polar Modulator Design• Conclusion

2015/12/12 M.A.ABDEL 15D14048

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Matsuzawa& Okada Lab.M.A.ABDEL 15D140482015/12/12

Frequency [GHz]0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7

Terrestrial

Satellite (IF)

Cable

Worldwide Frequency Allocation

Mobile

VHF/UHF/L/S Bands

Integrated All-standard Modulator hasn’t been reported yet.

3


UHDTV Broadcasting Roadmap

Increasing data rates Higher order modulation schemes

2014

2016

2020

4K Test BroadcastBit Rate = 35 Mb/s

8K Test BroadcastBit Rate = 91.8 Mb/s

4K/8K Full ScaleBroadcasting(Tokyo Olympics)

8K = 16 x FHD !

*From “Promoting the Advancementof Broadcasting Services: the RoadMap to 4K and 8K”. MIC. 2014.

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Outline


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1,E-06

1,E-05

1,E-04

1,E-03

1,E-02

1,E-01

1,E+00

0 10 20 30 40

BER

Eb/N0 [dB]

Eb/N0 = C/N * BW/Rs x m

M.A.ABDEL 15D140482015/12/12

BER over AWGN

16QAM12.2 dB

64QAM16.5 dB

256QAM21.1 dB

4096QAM31.2 dB

QPSK8.3 dB

1024QAM26.1 dB

QuasiErrorFree16KQAM

36.5 dB

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Digital Television Evolution

Standard ModulationData Rate

[Mb/s]

BW [MHz]

Required C/N [dB](spec)

TxMER[dB]

(typical)DVB-S QPSK SC 45.4 36 > 8.4 > 38DVB-S2 8PSK SC 65 36 > 7.9 > 38

DVB-S2X 16APSK SC 89 36 > 12 > 42DVB-C 64QAM SC 38.1 8 > 26 > 40

DVB-C2 4096QAM OFDM 79.5 8 > 34.8 > 40

DTMB 64QAM OFDM 24.3 8 > 14.9 > 40DTMB-A 256- APSK OFDM 49.6 8 > 22.8 -

ISDBT-T/Tb 64QAM OFDM 23.2 6 > 22 > 408K Super Hi-

Vision 4096QAM OFDM 91.8 6 > 35.7* > 45*

*From “Super Hi-Vision Terrestrial Transmission Test”. NHK STRL. 2013.

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TxMER degradation

Tx error sources: AWGN LO Phase Noise I/Q imbalance

LO leakage/pulling DAC error PA compression

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Direct Conversion Modulator

M.A.ABDEL 15D140482015/12/12

I/Q imbalance

LO leakage/pulling LO Phase Noise

AWGN DAC error

PA compression

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Direct Polar Modulator

M.A.ABDEL 15D140482015/12/12

DAC error becomes critical

AWGN Slow operation speed

Spurious

PA compression

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Direct Polar ModulatorAdvantages:

M.A.ABDEL 15D140482015/12/12

• No I/Q mismatch• Low Phase Noise• Low LO leakage/pulling• Supports effortless digital modulation• Better scaling with CMOS technology

• 50 MHz - 2660 MHz band operation• DAC errors becomes critical• Spurious performance

Challenges:

TxMER

TxMER

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Outline


2015/12/12 M.A.ABDEL 15D14048

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M.A.ABDEL 15D140482015/12/12

RF-DDFS Design:

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Classic Digital Mapping DDFS:

DDFSout = A*sin(ωt + ϴ) [2]

RF-DDFS Design

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RF-DDFS Design

2015/12/12 M.A.ABDEL 15D14048

T = 24 bits

P = 14 bits

A = 10 bits

Proposed Complementary Dual PhaseLatch-Based (CDPL) DDFS:

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RF-DDFS Design

2015/12/12 M.A.ABDEL 15D14048

Phase Accumulator (PA 2 bits) :

p1 p2 p3 p1 p2 p3

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Matsuzawa& Okada Lab.2015/12/12

Floorplan view (CMOS 65nm)460 µm

230 µm

PAPAC

Control

SPI

M.A.ABDEL 15D14048

57.2 µm

138 µm

224 µm

382.6 µm

RF-DDFS Design

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Matsuzawa& Okada Lab.2015/12/12 M.A.ABDEL 15D14048

RF-DDFS Design

Reference Arch. T P A TechnologySampling

Rate (GS/s)

Area(mm2)

Power (mW)

FFDDFS

Digital Mapping 24 14 10

CMOS65 nm 3.9 0.114 238

CDPLDDFS

Digital Mapping 24 14 10 CMOS

65 nm 6.8 0.105 145

Performance Comparison:

CDPL-DDFS can achieve a highersampling rate and lower powerconsumption when compared with a Flip-Flop approach.

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RF-DDFS Design

JSSC

APCCAS

VLSIC

ISSCC

This Work

0,00

2,00

4,00

6,00

8,00

2002 2004 2006 2008 2010 2012 2014 2016

Mas

ter C

lock

(GH

z)

Year

Maximum Frequency (CMOS)

0.25 µm CMOS 0.35 µm CMOS 0.13 µm CMOS0.18 µm CMOS 0.09 µm CMOS 0.055 µm CMOS

M.A.ABDEL 15D14048

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RF-DDFS Design

Reference Arch. T (PA bits)

A (DAC bits)

CMOS Technology

SamplingRate

(GS/s)

Area(mm2)

PE (W/GS/s)

SFDR(dBc)

JSSC’04 Digital Mapping 32 9 0.35 µm 0.8 1.47 0.217 55

*APCCAS’08

Nonlinear DAC 12 7 90 nm 4 N/A 0.1155 44

VLSIC’09 Nonlinear DAC 24 11 90 nm 1.3 2 0.26 52

*TCSI’11 (Without

DAC)

Digital Mapping 24 9 0.13 µm 1.4 0.006 0.005 62

ISSCC’14 Nonlinear DAC 32 9 55 nm 2 0.1 0.065 55.1

This Work (Without

DAC)

Digital Mapping 24 10 65 nm 6.8 0.1 0.022 45.3

M.A.ABDEL 15D14048

Performance Comparison:

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M.A.ABDEL 15D140482015/12/12

RF-DAC Design:

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RF-DAC Design

2015/12/12 M.A.ABDEL 15D14048

Interleaved DAC architecture:

DAC-A

DAC-B

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Outline


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Conclusions

1. 4K and 8K ultra-high-definition videotechnology is already making inroadsinto broadcasting.

2. Integrated All-Standard-All-BandModulator is proposed:• High TxMER Direct Polar Modulator

(TxMER > 45 dB).• Complementary Dual-Phase Latch-

Based DDFS (Fout = 2.7 GHz).• Interleaving RF-DAC. (Fout = 2.7 GHz).

2015/12/12 M.A.ABDEL 15D14048

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References

2015/12/12 M.A.ABDEL 15D14048

[1] D. ANALOG. “3.5 GSPS Direct Digital Synthesizer with 12-Bit DAC”, 2014. [2] G. Ken. “DDS simplifies polar modulation”, EDN Network, 2004. [3] D. ANALOG. “A Technical Tutorial on Digital Signal Synthesis”. Web site:

http://www.analog.com, 1999. [4] M. Shin, et al., “The feasibility Study on the 4K-UHD Satellite Broadcasting Service

in Ka-Band”, ICCE, 2013. [5] European Telecommunications Standards Institute. EN 302 755 V1.3.1, 2012.[6] Digital Broadcasting Experts Group. ABNT NBR 15601, 2009. [7] Advanced Television Systems Committee. ATSC Digital Television Standard, 2007.

http://www.analog.com/


ALL-STANDARD-ALL-BAND POLAR MODULATOR FOR DIGITAL

TELEVISION BROADCASTING

Martínez Alonso Abdel

Matsuzawa and Okada LaboratoriesTokyo Institute of Technology

2015/12/12

Documents

ALL-STANDARD-ALL-BAND POLAR MODULATOR FOR DIGITAL ... · Matsuzawa & Okada Lab. ALL-STANDARD-ALL-BAND POLAR MODULATOR FOR DIGITAL TELEVISION BROADCASTING. Martínez Alonso Abdel