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FF5F.3.pdf Frontiers in Optics/Laser Science 2016 © OSA 2016 Demonstration of Self-Aligned Flip-Chip Photonic Assembly with 1.1dB Loss and >120nm Bandwidth Tymon Barwicz, Yves Martin, Jae-Woong Nah, Swetha Kamlapurkar, Robert L. Bruce, Sebastian Engelmann, Yurii A. Vlasov. IBM T.J. Watson Research Center, 1101 Kitchawan Rd., Yorktown Heights, NY 10598 USA [email protected] Abstract: We demonstrate direct flip-chip assembly of photonic dies with solder-induced self- alignment to sub-micron accuracy. We find a peak chip-to-chip transmission of -1.1 dB with 0.2 dB penalty over the 120 nm spectrum measured. OCIS codes: (130.3120) Integrated optics devices; (250.5300) Photonic integrated circuits A scalable and cost-efficient approach to integration of various photonic chips that are optically and electrically connected to one another is a key aspect of photonic packaging and a key enabler of photonic technology. Here, we demonstrate self-aligned, direct, flip-chip assembly of photonic dies. Our approach is compatible with standard high- throughput microelectronic packaging facilities with typical ±10 μm tool placement accuracy. Although very large optical modes have been demonstrated on Si photonic platforms [1], they cannot be universally enabled in all material systems. For a universal chip-to-chip approach, butt-coupling is preferred and a modest mode size needs to be assumed, which results in tight sub-micron alignment requirements for adequate optical coupling. To achieve this accuracy, we rely on solder-induced self-alignment as illustrated in Fig. 1 [2]. A secondary photonic die, such as an InP laser array, is picked and placed on a primary photonic die or wafer with a purposeful offset from its desired position. During solder reflow, the surface tension of melted solder pushes the secondary die into alignment. Lithographically defined mechanical structures stop the solder-induced movement for three-dimensional, sub-micron, alignment accuracy. This approach was used here to demonstrate -1.1 dB peak chip-to-chip transmission with 0.2 dB penalty over a 120 nm bandwidth, as shown in Fig. 2. Silicon photonic chips were used as both the primary and secondary die for convenience but the approach extends to any material system such as III-V chips on Si or chips with exotic non-linear materials that can be difficult to integrate in a standard Si photonic platform. Solder-assisted alignment has been proposed before [3]. The differentiating aspect here is the final accuracy sought and the tackling of yield-limiting issues prohibiting manufacturability of typical solder self-aligned approaches [4]. Fig.1. (a) Optical micrograph of a self-aligned photonic flip-chip assembly indicating the position of the cross-sectional conceptual schematics of (b)-(g). A secondary die, such as an InP laser array, is picked (b)-(c) and placed on the primary die with an intentional offset from the desired position (d)-(e). At anneal, the solder surface tension pulls the secondary die into alignment with lithographically defined stops providing sub-micron accuracy (f)-(g). For the three steps of the process, cross-sections across the chip-to-chip coupling waveguides are shown in (b), (d), and (f) and along the coupling waveguides in (c), (e), and (g).

Demonstration of Self-Aligned Flip-Chip Photonic Assembly ......IEEE Electronic Components and Technology Conference (ECTC), Las Vegas, NE, May 31 June 3, 2016.-Fig. 4. Optical performance

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Page 1: Demonstration of Self-Aligned Flip-Chip Photonic Assembly ......IEEE Electronic Components and Technology Conference (ECTC), Las Vegas, NE, May 31 June 3, 2016.-Fig. 4. Optical performance

FF5F.3.pdf Frontiers in Optics/Laser Science 2016 © OSA 2016

Demonstration of Self-Aligned Flip-Chip Photonic Assembly with 1.1dB Loss and >120nm Bandwidth

Tymon Barwicz, Yves Martin, Jae-Woong Nah, Swetha Kamlapurkar,

Robert L. Bruce, Sebastian Engelmann, Yurii A. Vlasov. IBM T.J. Watson Research Center, 1101 Kitchawan Rd., Yorktown Heights, NY 10598 USA

[email protected]

Abstract: We demonstrate direct flip-chip assembly of photonic dies with solder-induced self-alignment to sub-micron accuracy. We find a peak chip-to-chip transmission of -1.1 dB with 0.2 dB penalty over the 120 nm spectrum measured. OCIS codes: (130.3120) Integrated optics devices; (250.5300) Photonic integrated circuits

A scalable and cost-efficient approach to integration of various photonic chips that are optically and electrically connected to one another is a key aspect of photonic packaging and a key enabler of photonic technology. Here, we demonstrate self-aligned, direct, flip-chip assembly of photonic dies. Our approach is compatible with standard high-throughput microelectronic packaging facilities with typical ±10 μm tool placement accuracy. Although very large optical modes have been demonstrated on Si photonic platforms [1], they cannot be universally enabled in all material systems. For a universal chip-to-chip approach, butt-coupling is preferred and a modest mode size needs to be assumed, which results in tight sub-micron alignment requirements for adequate optical coupling. To achieve this accuracy, we rely on solder-induced self-alignment as illustrated in Fig. 1 [2]. A secondary photonic die, such as an InP laser array, is picked and placed on a primary photonic die or wafer with a purposeful offset from its desired position. During solder reflow, the surface tension of melted solder pushes the secondary die into alignment. Lithographically defined mechanical structures stop the solder-induced movement for three-dimensional, sub-micron, alignment accuracy. This approach was used here to demonstrate -1.1 dB peak chip-to-chip transmission with 0.2 dB penalty over a 120 nm bandwidth, as shown in Fig. 2. Silicon photonic chips were used as both the primary and secondary die for convenience but the approach extends to any material system such as III-V chips on Si or chips with exotic non-linear materials that can be difficult to integrate in a standard Si photonic platform. Solder-assisted alignment has been proposed before [3]. The differentiating aspect here is the final accuracy sought and the tackling of yield-limiting issues prohibiting manufacturability of typical solder self-aligned approaches [4].

Fig.1. (a) Optical micrograph of a self-aligned photonic flip-chip assembly indicating the position of the cross-sectional conceptual schematics of (b)-(g). A secondary die, such as an InP laser array, is picked (b)-(c) and placed on the primary die with an intentional offset from the desired position (d)-(e). At anneal, the solder surface tension pulls the secondary die into alignment with lithographically defined stops providing sub-micron accuracy (f)-(g). For the three steps of the process, cross-sections across

the chip-to-chip coupling waveguides are shown in (b), (d), and (f) and along the coupling waveguides in (c), (e), and (g).

Page 2: Demonstration of Self-Aligned Flip-Chip Photonic Assembly ......IEEE Electronic Components and Technology Conference (ECTC), Las Vegas, NE, May 31 June 3, 2016.-Fig. 4. Optical performance

FF5F.3.pdf Frontiers in Optics/Laser Science 2016 © OSA 2016

Our demonstration vehicle is described in Fig. 2 (a)-(c). Each secondary die includes eight ports with couplers, adiabatic mode converters, and loopbacks enabling the measurement of chip-to-chip transmission by probing the primary die with lensed fibers and normalizing the power to the transmission across the reference straight waveguide. An elongated coupler mode is desired to match the larger horizontal than vertical alignment tolerances. It is achieved by reusing typical layers of production Si photonic platforms to create a coupler resembling a strip-loaded waveguide. The structure is shown in Fig. 2(b) and matches rectangular waveguides in lower index-contrast systems, such as InP devices, with >98% mode overlap. Self-aligned coupling efficiencies are reported in Fig. 2(d) for the TE polarization. A peak performance of -1.1 dB is shown on port B with 0.2 dB penalty over the 120 nm bandwidth measured. The mode conversion loss was measured on a reference structure and then subtracted from the transmission of Fig. 2(d) to obtain the facet and alignment loss of Fig. 2(e). The variation in performance across the channels of Fig. 2(d) is attributed to a spread in converter lengths penalizing channel A and to a visible defect in the secondary die’s facet on channel C. The spectral ripple is mainly attributed to reflections at the lensed-fiber interfaces. Chip-to-chip reflections are managed by index matching of residual gaps. Isopropanol (n~1.37) was used here but optical underfill with 1.45-1.50 index would be optimal.

We have demonstrated a universal approach to self-aligned flip-chip photonic assembly compatible with high-throughput manufacturing. A peak chip-to-chip transmission of -1.1dB with ultra-wide spectral bandwidth was shown.

Acknowledgments The photonic chips were fabricated in the Microelectronics Research Laboratory at the IBM T.J Watson Research Center. We thank Chi Xiong and Jason S. Orcutt for assistance with the optical characterization setup.

References [1] T. Barwicz et al., "An O-band Metamaterial Converter Interfacing Standard Optical Fibers to Silicon Nanophotonic Waveguides," in OFC

2015, OSA Technical Digest (online) (Optical Society of America, 2015), paper Th3F.3. [2] J.-W. Nah, Y. Martin, S. Kamlapurkar, S. Engelmann, R.L. Bruce, T. Barwicz, "Flip chip assembly with sub-micron 3D re-alignment via

solder surface tension," in Proc. of IEEE Electronic Components and Technology Conference (ECTC), (IEEE, New York, 2015), pp.35-40. [3] Q. Tan, Y.C. Lee, "Soldering technology for optoelectronic packaging," in Proc. of 46th ECTC, (IEEE, New York, 1996), pp. 26-36. [4] Y. Martin et al., “Toward high-yield 3D self-alignment of flip-chip assemblies via solder surface tension,” accepted for presentation at the

IEEE Electronic Components and Technology Conference (ECTC), Las Vegas, NE, May 31 - June 3, 2016.

Fig. 4. Optical performance of self-aligned, flip-chip photonic assembly. (a) Top-view schematic of the optical test structure. Non-linear adiabatic converter lengths of 37.5, 75, 150, and 250 μm were used across ports A, B, C, and D,

respectively. (b) Coupler waveguide cross-section with superimposed Ex field of the TE mode in blue. (c) Photograph of a Si photonic die with five self-aligned secondary dies. (d) Chip-to-chip transmission. The Fabry-Perot ripple from the

lensed-fiber interface was filtered and the resulting curve superimposed on raw data. (e) Facet loss obtained by subtracting from (d) the total mode conversion loss measured on a reference structure.