cmos, analog , design-16

Embed Size (px)

Citation preview

  • 8/10/2019 cmos, analog , design-16

    1/368 2005 IEEE International Solid-State Circuits Conference 0-7803-8904-2/05/$20.00 2005 IEEE.

    ISSCC 2005 / SESSION 3 / BACKPLANE TRANSCEIVERS / 3.5

    3.5 A 6.25Gb/s Binary Adaptive DFE

    with First Post-Cursor Tap Cancellationfor Serial Backplane Communications

    Robert Payne, Bhavesh Bhakta, Sridhar Ramaswamy, Song Wu,John Powers, Paul Landman, Ulvi Erdogan, Ah-Lyan Yee,Richard Gu, Lin Wu, Yiqun Xie, Bharat Parthasarathy, Keith Brouse,Wahed Mohammed, Keerthi Heragu, Vikas Gupta, Lisa Dyson,Wai Lee

    Texas Instruments, Dallas, TX

    As backplane data rates scale to 6.25Gb/s and beyond, trans-ceivers must communicate in legacy systems originally designedfor lower data rates. These cost-conscious system channels typ-ically include >30 of FR-4 trace and several board connectorsand signal vias, resulting in received signal eyes closed by ISI,crosstalk noise, and reflections [1]. Previous solutions to limitedchannel bandwidths use transmitter pre-emphasis (or de-emphasis) to boost the relative transmit amplitude of high-fre-quency data, linear filters to boost high frequencies at the receiv-er, or multi-level signaling solutions such as PAM-4 to fully uti-lize the available bandwidth. While effective for equalizing iso-

    lated channels, transmitter de-emphasis can also increasecrosstalk, resulting in a decreased system SNR. Linear filterscan flatten the channel response, but noise is amplified as wellas the desired signal making them unsuitable for some legacybackplanes with significant high-frequency crosstalk. AlthoughPAM-4 reduces the required bandwidth, no signaling standardsexist and the impact of reflections on PAM-4 solutions can beworse compared to binary signaling [2].

    DFEs can overcome these limitations. In a DFE, prior data deci-sions are multiplied by tap weights equaling the magnitude ofthe ISI and subtracted from the received signal, eliminating ISIfrom subsequent bits. When correct decisions are made, thepost-cursor channel response is equalized without boosting high-frequency crosstalk. A half-baud rate adaptive DFE with directfirst post-cursor tap cancellation suitable for legacy backplanes

    is presented in this paper. In particular, systems require: 1) 4post-cursor taps to equalize up to 20dB of channel loss at3.125GHz, yielding BER

  • 8/10/2019 cmos, analog , design-16

    2/3

  • 8/10/2019 cmos, analog , design-16

    3/3585 2005 IEEE International Solid-State Circuits Conference 0-7803-8904-2/05/$20.00 2005 IEEE.

    ISSCC 2005 PAPER CONTINUATIONS

    Figure 3.5.7: Chip micrograph.

    Single RX channel

    0.13m 7LM

    1.2V supply

    0.24mm2

    180mW

    8 - 6.25G TX Channels 8 - 6.25G RX Channels