Å þ å | - ÈBTL0GTL C í È R J kO J «QMMNBY8143 Å þ å | - ÈBTL0GTL C í È R J kO J «QMM 2 _____ ABSOLUTE MAXIMUM RATINGS Stresses beyond those listed under “Absolute Maximum

Ω

° °

♦

♦

♦

♦

♦

♦

♦ Ω

♦

♦

♦

♦ *

♦

♦

♦

♦

♦

♦ μ

♦

♦ μ

♦

________________________________________________________________ Maxim Integrated Products 1

19-3685; Rev 2; 11/10

* %

**

PART TEMP RANGE PIN-PACKAGE

MAX7032ATJ+ -40°C to +125°C 32 Thin QFN-EP**

http://china.maxim-ic.com

2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functionaloperation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure toabsolute maximum rating conditions for extended periods may affect device reliability.

HVIN to GND .........................................................-0.3V to +6.0VPAVDD, AVDD, DVDD to GND..............................-0.3V to +4.0VENABLE, T/R, DATA, CS, DIO, SCLK, CLKOUT to

GND.....................................................-0.3V to (VHVIN + 0.3V)All Other Pins to GND .............................-0.3V to (V_VDD + 0.3V)

Continuous Power Dissipation (TA = +70°C)32-Pin Thin QFN (derate 21.3mW/°C above +70°C)....1702mW

Operating Temperature Range .........................-40°C to +125°CStorage Temperature Range .............................-65°C to +150°CLead Temperature (soldering, 10s) .................................+300°CSoldering Temperature (reflow) .......................................+260°C

DC ELECTRICAL CHARACTERISTICS(Typical Application Circuit, 50Ω system impedance, VAVDD = VDVDD = VPAVDD = VHVIN = +2.1V to +3.6V, fRF = 300MHz to 450MHz,TA = -40°C to +125°C, unless otherwise noted. Typical values are at VAVDD = VDVDD = VPAVDD = VHVIN = +2.7V, TA = +25°C, unlessotherwise noted.) (Note 1)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Supply Voltage (3V Mode) VDDHVIN, PAVDD, AVDD, and DVDD connected topower supply

2.1 2.7 3.6 V

Supply Voltage (5V Mode) HVINPAVDD, AVDD, and DVDD unconnected fromHVIN, but connected together

4.5 5.0 5.5 V

fRF = 315MHz 3.5 5.4Transmit mode, PA off,VDATA at 0% duty cycle(ASK) (Note 2) fRF = 434MHz 4.3 6.7

fRF = 315MHz 7.6 12.3Transmit mode, VDATAat 50% duty cycle(ASK) (Notes 3, 4) fRF = 434MHz 8.4 13.6

fRF = 315MHz (Note 4) 11.6 19.1Transmit mode, VDATAat 100% duty cycle(FSK) fRF = 434MHz (Note 2) 12.4 20.4

mA

Receiver (ASK 315MHz) 6.1 7.9


Receiver (FSK 315MHz) 6.4 8.4


mA

DRX (3V mode) 23.4 77.3

DRX (5V mode) 67.2 94.4

Deep-sleep (3V mode) 0.8 8.8

TA < +85°C,typ at +25°C(Note 4)


μA





mA

DRX (3V mode) 33.5 103.0

DRX (5V mode) 82.3 116.1


Supply Current IDD

TA < +125°C,typ at +125°C(Note 2)


μA

Voltage Regulator VREG VHVIN = 5V, ILOAD = 15mA 3.0 V

_______________________________________________________________________________________ 3

DC ELECTRICAL CHARACTERISTICS (continued)(Typical Application Circuit, 50Ω system impedance, VAVDD = VDVDD = VPAVDD = VHVIN = +2.1V to +3.6V, fRF = 300MHz to 450MHz,TA = -40°C to +125°C, unless otherwise noted. Typical values are at VAVDD = VDVDD = VPAVDD = VHVIN = +2.7V, TA = +25°C, unlessotherwise noted.) (Note 1)


DIGITAL I/O

Input High Threshold VIH (Note 2) 0.9 x VHVIN V

Input Low Threshold VIL (Note 2) 0.1 x VHVIN V

Pulldown Sink Current SCLK, ENABLE, T/R, DATA (VHVIN = 5.5V) 20 μA

Pullup Source Current DIO, CS (VHVIN = 5.5V) 20 μA

Output-Low Voltage VOL ISINK = 500μA 0.15 V

Output-High Voltage VOH ISOURCE = 500μAVHVIN -

0.26V

AC ELECTRICAL CHARACTERISTICS(Typical Application Circuit, 50Ω system impedance, VAVDD = VDVDD = VPAVDD = VHVIN = +2.1V to +3.6V, fRF = 300MHz to 450MHz,TA = -40°C to +125°C, unless otherwise noted. Typical values are at VPAVDD = VAVDD = VDVDD = VHVIN = +2.7V, TA = +25°C, unlessotherwise noted.) (Note 1)


GENERAL CHARACTERISTICS

Frequency Range 300 450 MHz

Maximum Input Level PRFIN 0 dBm

fRF = 315MHz (Note 6) 32Transmit Efficiency 100% DutyCycle fRF = 434MHz (Note 6) 30

%

fRF = 315MHz (Note 6) 24Transmit Efficiency 50% DutyCycle fRF = 434MHz (Note 6) 22

%

ENABLE or T/R transition low to high,transmitter frequency settled to within50kHz of the desired carrier

200

ENABLE or T/R transition low to high,transmitter frequency settled to within 5kHzof the desired carrier

350Power-On Time tON

ENABLE transition low to high, or T/Rtransition high to low receiver startup time(Note 5)

250

μs

RECEIVER

ASK (315MHz) -114

ASK (434MHz) -113

FSK (315MHz) -110Sensitivity

0.2% BER, 4kbpsManchester data rate,280kHz IF BW, ±50kHzFSK deviation,average power FSK (434MHz) -107

dBm

Image Rejection (Note 8) 46 dB

4 _______________________________________________________________________________________

AC ELECTRICAL CHARACTERISTICS (continued)(Typical Application Circuit, 50Ω system impedance, VAVDD = VDVDD = VPAVDD = VHVIN = +2.1V to +3.6V, fRF = 300MHz to 450MHz,TA = -40°C to +125°C, unless otherwise noted. Typical values are at VPAVDD = VAVDD = VDVDD = VHVIN = +2.7V, TA = +25°C, unlessotherwise noted.) (Note 1)


POWER AMPLIFIER

TA = +25°C (Note 4) 4.6 10.0 15.5

TA = +125°C, VAVDD = VDVDD = VHVIN =VPAVDD = +2.1V (Note 2)

3.9 6.7Output Power POUT

TA = -40°C, VAVDD = VDVDD = VHVIN =VPAVDD = +3.6V (Note 4)

13.1 15.8

dBm

Modulation Depth 82 dB

Maximum Carrier Harmonics With output-matching network -40 dBc

Reference Spur -50 dBc

PHASE-LOCKED LOOP

Transmit VCO Gain KVCO 340 MHz/V

10kHz offset, 200kHz loop BW -68Transmit PLL Phase Noise

1MHz offset, 200kHz loop BW -98dBc/Hz

Receive VCO Gain 340 MHz/V

10kHz offset, 500kHz loop BW -80Receive PLL Phase Noise

1MHz offset, 500kHz loop BW -90dBc/Hz

Transmit PLL 200Loop Bandwidth

Receive PLL 500kHz

Minimum Transmit FrequencyStep

fXTAL/4096

kHz

Reference Frequency Input Level 0.5 VP-P

Programmable Divider Range In transmit mode (Note 4) 20 27

LOW-NOISE AMPLIFIER/MIXER (Note 9)

fRF = 315MHz 1 - j4.7LNA Input Impedance ZINLNA

Normalized to50Ω fRF = 434MHz 1 - j3.3

fRF = 315MHz 50High-gain state

fRF = 434MHz 45

fRF = 315MHz 13Voltage-Conversion Gain

Low-gain statefRF = 434MHz 9

dB

High-gain state -42Input-Referred 3rd-OrderIntercept Point

IIP3Low-gain state -6

dBm

Mixer Output Impedance 330 Ω

LO Signal Feedthrough toAntenna

-100 dBm

RSSI

Input Impedance 330 Ω

Operating Frequency fIF 10.7 MHz

3dB Bandwidth 10 MHz

_______________________________________________________________________________________ 5



Gain 15 mV/dB

FSK DEMODULATOR

Conversion Gain 2.0 mV/kHz

ANALOG BASEBAND

Maximum Data Filter Bandwidth 50 kHz

Maximum Data Slicer Bandwidth 100 kHz

Maximum Peak DetectorBandwidth

50 kHz

Manchester coded 33Maximum Data Rate

NRZ 66kbps

CRYSTAL OSCILLATOR

Crystal Frequency fXTAL (fRF - 10.7)/24 MHz

Frequency Pulling by VDD 2 ppm/V

Crystal Load Capacitance (Note 7) 4.5 pF

SERIAL INTERFACE TIMING CHARACTERISTICS (see Figure 7)

Minimum SCLK Setup to FallingEdge of CS

tSC 30 ns

Minimum CS Falling Edge toSCLK Rising-Edge Setup Time

tCSS 30 ns

Minimum CS Idle Time tCSI 125 ns

Minimum CS Period tCS 2.125 μs

Maximum SCLK Falling Edge toData Valid Delay

tDO 80 ns

Minimum Data Valid to SCLKRising-Edge Setup Time

tDS 30 ns

Minimum Data Valid to SCLKRising-Edge Hold Time

tDH 30 ns

Minimum SCLK High Pulse Width tCH 100 ns

Minimum SCLK Low Pulse Width tCL 100 ns

Minimum CS Rising Edge toSCLK Rising-Edge Hold Time

tCSH 30 ns

Maximum CS Falling Edge toOutput Enable Time

tDV 25 ns

Maximum CS Rising Edge toOutput Disable Time

tTR 25 ns

6 _______________________________________________________________________________________

(Typical Application Circuit, VPAVDD = VAVDD = VDVDD = VHVIN = +3.0V, fRF = 433.92MHz, TA = +25°C, IF BW = 280kHz, data rate= 4kbps Manchester encoded, frequency deviation = ±50kHz, BER = 0.2% average RF power, unless otherwise noted.)


Note 1: Supply current, output power, and efficiency are greatly dependent on board layout and PAOUT match.Note 2: 100% tested at TA = +125°C. Guaranteed by design and characterization overtemperature.Note 3: 50% duty cycle at 10kHz ASK data (Manchester coded).Note 4: Guaranteed by design and characterization. Not production tested.Note 5: Time for final signal detection; does not include baseband filter settling.Note 6: Efficiency = POUT/(VDD x IDD).Note 7: Dependent on PCB trace capacitance.Note 8: The oscillator register (0x05) is set to the nearest integer result of fXTAL/100kHz (see the Oscillator Frequency Register

(Address 0x05) section).Note 9: Input impedance is measured at the LNAIN pin. Note that the impedance at 315MHz includes the 12nH inductive degenera-

tion from the LNA source to ground. The impedance at 434MHz includes a 10nH inductive degeneration connected from theLNA source to ground. The equivalent input circuit is approximately 50Ω in series with ~ 2.2pF. The voltage conversion ismeasured with the LNA input matching inductor, the degeneration inductor, and the LNA/mixer tank in place, and does notinclude the IF filter insertion loss.

SUPPLY CURRENT vs. SUPPLY VOLTAGE(ASK MODE)

MAX

7032

toc0

1

SUPPLY VOLTAGE (V)

SUPP

LY C

URRE

NT (m

A)

3.33.02.72.4

5.8

6.0

6.2

6.4

6.6

6.8

7.0

5.62.1 3.6

TA = +85°C

TA = +125°C

TA = +25°C

TA = -40°C

SUPPLY CURRENT vs. RF FREQUENCY(ASK MODE)

MAX

7032

toc0

2a

RF FREQUENCY (MHz)

SUPP

LY C

URRE

NT (m

A)

425400325 350 375

6.1

6.2

6.3

6.4

6.5

6.6

6.7

6.8

6.0300 450

TA = +85°C

TA = +125°C

TA = +25°C

TA = -40°C

SUPPLY CURRENT vs. RF FREQUENCY(FSK MODE)

MAX

7032

toc0

2b

RF FREQUENCY (MHz)

SUPP

LY C

URRE

NT (m

A)

425400325 350 375

6.5

6.6

6.7

6.8

6.9

7.0

6.4300 450

TA = +85°C

TA = +125°C

TA = +25°C

TA = -40°C

RECEIVER

_______________________________________________________________________________________ 7


DEEP-SLEEP CURRENT vs. TEMPERATURE

MAX

7032

toc0

3

TEMPERATURE (°C)

DEEP

-SLE

EP C

URRE

NT (μ

A)

1108535 60-10-15

2

4

6

8

10

12

14

16

18

0-40

VCC = +3.6V

VCC = +3.0V

VCC = +2.1V

BIT-ERROR RATE vs. AVERAGE INPUT POWER (ASK DATA)

MAX

7030

toc0

4

AVERAGE INPUT POWER (dBm)

BIT-

ERRO

R RA

TE (%

)

-113-115-117-119

0.1

1

10

100

0.01-121 -111

fRF = 434MHz

fRF = 315MHz

0.2% BER

BIT-ERROR RATE vs. AVERAGE INPUT POWER (FSK DATA)

MAX

7032

toc0

5

AVERAGE INPUT POWER (dBm)

BIT-

ERRO

R RA

TE (%

)

-108 -106-110-112-114

0.1

1

10

100

0.01-116 -104

fRF = 434MHz

0.2% BER

fRF = 315MHz

SENS

ITIV

ITY

(dBm

)

-117

-114

-111

-108

-105

-102

-120

SENSITIVITY vs. TEMPERATURE(ASK DATA)

MAX

7032

toc0

6

TEMPERATURE (°C)11085603510-15-40

fRF = 434MHz

fRF = 315MHz

SENS

ITIV

ITY

(dBm

)

-110

-108

-106

-104

-102

-100

-112

SENSITIVITY vs. TEMPERATURE(FSK DATA)

MAX

7032

toc0

7

TEMPERATURE (°C)11085603510-15-40

fRF = 434MHz

fRF = 315MHz

SENSITIVITY vs. FREQUENCY DEVIATION(FSK DATA)

MAX

7032

toc0

8

FREQUENCY DEVIATION (kHz)

SENS

ITIV

ITY

(dBm

)

10

-106

-104

-102

-100

-98

-96

-94

-1081 100

RSSI vs. RF INPUT POWER

MAX

7032

toc0

9

RF INPUT POWER (dBm)

RSSI

(V)

-10-30-70 -50-90-110

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

1.8

0-130 10

LOW-GAIN MODE

HIGH-GAIN MODE

AGC SWITCHPOINT

AGC HYSTERESIS: 3dB

RSSI AND DELTA vs. IF INPUT POWERMAX7032 toc10

IF INPUT POWER (dBm)

RSSI

(V)

-10-30-50-70

0.3

0.6

0.9

1.2

1.5

1.8

2.1

0-90 10

-2.5

-1.5

-0.5

0.5

1.5

2.5

3.5

-3.5

DELT

A (%

)

RSSI

DELTA

RECEIVER

8 _______________________________________________________________________________________


FSK DEMODULATOR OUTPUTvs. IF FREQUENCY

MAX

7032

toc1

1

IF FREQUENCY (MHz)

FSK

DEM

ODUL

ATOR

OUT

PUT

(V)

10.910.810.710.610.5

0.4

0.8

1.2

1.6

010.4 11.0

SYSTEM GAIN vs. IF FREQUENCY

MAX

7032

toc1

2

IF FREQUENCY (MHz)

SYST

EM G

AIN

(dBm

)

252015105

-10

0

10

20

30

40

50

-200 30

LOWER SIDEBAND

UPPER SIDEBAND

FROM RFINTO MIXOUTfRF = 434MHz

48dB IMAGE REJECTION

IMAGE REJECTION vs. TEMPERATURE

MAX

7032

toc1

3

IMAG

E RE

JECT

ION

(dB)

44

46

48

42

TEMPERATURE (°C)11085603510-15-40

fRF = 434MHz

fRF = 315MHz

NORMALIZED IF GAIN vs. IF FREQUENCY

MAX

7032

toc1

4

IF FREQUENCY (MHz)

NORM

ALIZ

ED IF

GAI

N (d

B)

10

-16

-12

-8

-4

0

-201 100

S11 vs. RF FREQUENCYM

AX70

32 to

c15

RF FREQUENCY (MHz)

S11

(dB)

450400350300250

-18

-12

-6

0

-24200 500

433.92MHz

S11 SMITH PLOT OF RFIN

MAX

7032

toc1

6

434MHz

500MHz400MHz

INPUT IMPEDANCE vs. INDUCTIVE DEGENERATION

MAX7032 toc17

INDUCTIVE DEGENERATION (nH)

REAL

IMPE

DANC

E (Ω

)

10

30

40

50

60

70

80

90

20

IMAG

INAR

Y IM

PEDA

NCE

(Ω)

-280

-270

-260

-250

-240

-230

-220

-2901 100

fRF = 315MHz

IMAGINARYIMPEDANCE

REAL IMPEDANCE

INPUT IMPEDANCE vs. INDUCTIVE DEGENERATION

MAX7032 toc18

INDUCTIVE DEGENERATION (nH)

REAL

IMPE

DANC

E (Ω

)

10

30

40

50

60

70

80

90

20

IMAG

INAR

Y IM

PEDA

NCE

(Ω)

-210

-200

-190

-180

-170

-160

-150

-2201 100

fRF = 434MHz

IMAGINARYIMPEDANCE

REAL IMPEDANCE

RECEIVER

_______________________________________________________________________________________ 9


PHASE NOISE vs. OFFSET FREQUENCY

MAX

7032

toc1

9

OFFSET FREQUENCY (Hz)

PHAS

E NO

ISE

(dBc

/Hz)

1M100k10k1k

-110

-100

-90

-80

-70

-60

-50

-120100 10M

fRF = 315MHz


MAX

7032

toc2

0


PHAS

E NO

ISE

(dBc

/Hz)

1M100k10k1k

-110

-100

-90

-80

-70

-60

-50

-120100 10M

fRF = 434MHz

SUPPLY CURRENT vs. SUPPLY VOLTAGE

MAX

7032

toc2

1

SUPPLY VOLTAGE (V)

SUPP

LY C

URRE

NT (m

A)

3.33.02.72.4

10

12

14

16

82.1 3.6

fRF = 315MHzPA ONWITHOUT ENVELOPE SHAPING

TA = +85°C

TA = +125°C

TA = -40°C

TA = +25°C SUPP

LY C

URRE

NT (m

A)

2.5

3.0

3.5

4.0

5.0

4.5

5.5

6.0

2.0

SUPPLY CURRENTvs. SUPPLY VOLTAGE

MAX

7032

toc2

2

SUPPLY VOLTAGE (V)3.33.02.72.42.1 3.6

fRF = 315MHzPA OFF

TA = +85°C

TA = +125°C

TA = -40°CTA = +25°C

SUPPLY CURRENT vs. SUPPLY VOLTAGE

MAX

7032

toc2

3

SUPPLY VOLTAGE (V)

SUPP

LY C

URRE

NT (m

A)

3.33.02.72.4

11

13

15

17

92.1 3.6

fRF = 434MHzPA ONWITHOUT ENVELOPE SHAPING

TA = +85°C

TA = +125°C TA = -40°C

TA = +25°C

SUPP

LY C

URRE

NT (m

A)

3.0

3.5

4.0

5.0

4.5

5.5

6.0

SUPPLY CURRENTvs. SUPPLY VOLTAGE

MAX

7032

toc2

4

SUPPLY VOLTAGE (V)3.33.02.72.42.1 3.6

fRF = 434MHzPA OFF

TA = +85°C

TA = +125°C

TA = -40°C

TA = +25°C

SUPPLY CURRENT vs. OUTPUT POWER

MAX

7032

toc2

5

AVERAGE OUTPUT POWER (dBm)

SUPP

LY C

URRE

NT (m

A)

62-10 -6 -2

5

6

7

8

9

10

11

12

4-14 10

fRF = 315MHzENVELOPE SHAPING ENABLED

PA ON

50% DUTY CYCLE

SUPPLY CURRENT vs. OUTPUT POWERM

AX70

32 to

c26

AVERAGE OUTPUT POWER (dBm)

SUPP

LY C

URRE

NT (m

A)

62-2-6-10

6

7

8

9

10

11

12

13

14

5-14 10

fRF = 434MHzENVELOPE SHAPING ENABLED

PA ON

50% DUTY CYCLE

RECEIVER

TRANSMITTER

10 ______________________________________________________________________________________


SUPPLY CURRENT AND OUTPUT POWER vs. EXTERNAL RESISTOR

MAX7032 toc27-1

EXTERNAL RESISTOR (Ω)

SUPP

LY C

URRE

NT (m

A)

1k1001 10

4

6

8

10

12

14

16

18

20.1 10k

-12

-8

-4

0

4

8

12

16

-16

OUTP

UT P

OWER

(dBm

)

fRF = 315MHzPA ON

POWER

CURRENT

SUPPLY CURRENT AND OUTPUT POWER vs. EXTERNAL RESISTOR

MAX7032 toc27-2

EXTERNAL RESISTOR (Ω)SU

PPLY

CUR

RENT

(mA)

1k1001 10

4

6

8

10

12

14

16

18

20.1 10k

-12

-8

-4

0

4

8

12

16

-16

OUTP

UT P

OWER

(dBm

)

fRF = 434MHzPA ON

POWER

CURRENT

OUTPUT POWER vs. SUPPLY VOLTAGE

MAX

7032

28-

1

SUPPLY VOLTAGE (V)

OUTP

UT P

OWER

(dBm

)

3.33.02.72.4

6

8

10

12

14

42.1 3.6

fRF = 315MHzPA ONENVELOPE SHAPING DISABLED

TA = +85°C

TA = +125°C

TA = +25°C

TA = -40°C

OUTPUT POWER vs. SUPPLY VOLTAGEM

AX70

32 2

8-2

SUPPLY VOLTAGE (V)

OUTP

UT P

OWER

(dBm

)

3.33.02.72.4

6

8

10

12

14

42.1 3.6

fRF = 315MHzPA ONENVELOPE SHAPING ENABLED

TA = +85°C

TA = +125°C

TA = +25°C

TA = -40°C


MAX

7032

29-

1

SUPPLY VOLTAGE (V)

OUTP

UT P

OWER

(dBm

)

3.33.02.72.4

6

8

10

12

14

42.1 3.6

fRF = 434MHzPA ONENVELOPE SHAPING DISABLED

TA = +85°C

TA = +125°C

TA = +25°CTA = -40°C


MAX

7032

29-

2

SUPPLY VOLTAGE (V)

OUTP

UT P

OWER

(dBm

)

3.33.02.72.4

8

10

12

14

62.1 3.6

fRF = 434MHzPA ONENVELOPE SHAPING ENABLED

TA = +85°C

TA = +125°C

TA = +25°C

TA = -40°C

EFFICIENCY vs. SUPPLY VOLTAGE

MAX

7032

toc3

0

SUPPLY VOLTAGE (V)

EFFI

CIEN

CY (%

)

3.33.02.72.4

25

30

35

40

202.1 3.6

TA = +85°C

TA = +125°C

TA = +25°C

TA = -40°CfRF = 315MHzPA ON

EFFICIENCY vs. SUPPLY VOLTAGEM

AX70

32 to

c31

SUPPLY VOLTAGE (V)

EFFI

CIEN

CY (%

)

3.33.02.72.4

25

30

35

40

202.1 3.6

TA = +85°C

TA = +125°C

TA = +25°C

TA = -40°C

fRF = 434MHzPA ON

TRANSMITTER

______________________________________________________________________________________ 11


CLKOUT SPUR MAGNITUDE vs. SUPPLY VOLTAGE

MAX

7032

toc3

8

SUPPLY VOLTAGE (V)

CLKO

UT S

PUR

MAG

NITU

DE (d

Bc)

3.33.02.72.4

-64

-62

-60

-58

-56

-662.1 3.6

fCLKOUT = fXTAL/8

fCLKOUT = fXTAL/2

fCLKOUT = fXTAL/4

fRF = 434MHzCLKOUT SPUR = fRF ± fCLKOUT10pF LOAD CAPACITANCE


MAX

7032

toc3

2

SUPPLY VOLTAGE (V)

EFFI

CIEN

CY (%

)

3.33.02.72.4

15

20

25

30

102.1 3.6

TA = +85°CTA = +125°C

TA = +25°C

TA = -40°C

fRF = 315MHz50% DUTY CYCLE


MAX

7032

toc3

3

SUPPLY VOLTAGE (V)

EFFI

CIEN

CY (%

)

3.33.02.72.4

20

25

30

152.1 3.6

TA = +85°C

TA = +125°C

TA = +25°C

TA = -40°C

fRF = 434MHz50% DUTY CYCLE


MAX

7032

toc3

4


PHAS

E NO

ISE

(dBc

/Hz)

1M100k10k1k

-130

-120

-110

-100

-90

-80

-70

-60

-50

-40

-140100 10M

fRF = 315MHz


MAX

7032

toc3

5


PHAS

E NO

ISE

(dBc

/Hz)

1M100k10k1k

-130

-120

-110

-100

-90

-80

-70

-60

-50

-40

-140100 10M

fRF = 434MHz

REFERENCE SPUR MAGNITUDE vs. SUPPLY VOLTAGE

MAX

7032

toc3

6

SUPPLY VOLTAGE (V)

REFE

RENC

E SP

UR M

AGNI

TUDE

(dBc

)

3.33.02.72.4

-65

-60

-55

-50

-45

-40

-702.1 3.6

433.92MHz

315MHz

FREQUENCY STABILITY vs. SUPPLY VOLTAGE

MAX

7032

toc3

7

SUPPLY VOLTAGE (V)

FREQ

UENC

Y ST

ABIL

ITY

(ppm

)

3.33.02.72.4

-8

-6

-4

-2

0

2

4

6

8

10

-102.1 3.6

fRF = 315MHz

fRF = 434MHz

TRANSMITTER

12 ______________________________________________________________________________________

1 PAVDD

2 ROUT

3 TX/RX1

4 TX/RX2

5 PAOUT

6 AVDD

7 LNAIN

8 LNASRC

9 LNAOUT

10 MIXIN+

11 MIXIN-

12 MIXOUT

13 IFIN-

14 IFIN+

15 PDMIN

16 PDMAX

17 DS-

18 DS+

19 OP+

20 DF

21 RSSI

22 T/R

23 ENABLE

24 DATA

25 CLKOUT

26 DVDD

μ

R R

μ

Ω

Ω

Ω

μ

Ω

= =

fL CTOTAL TOTAL

=×

1

2π

______________________________________________________________________________________ 13

27 HVIN

28 CS

29 DIO

30 SCLK

31 XTAL1

32 XTAL2

— EP

μ

Ω ΩΩ

fREF = (fRF – fIF)/24

Ω

μ

FILTER TYPE a b

Butterworth(Q = 0.707)

1.414 1.000

Bessel(Q = 0.577)

1.3617 0.618

14 ______________________________________________________________________________________

LOOPFILTER

PHASEDETECTOR

IFLIMITING

AMPS

TO FSK BASEBAND FILTERAND DATA SLICER

10.7MHz VCO2.0mV/kHz

CHARGEPUMP

______________________________________________________________________________________ 15

Ck kHz

pF

Ck kHz

pF

F

F

1

2

1 0001 414 100 3 14 5

450

1 4144 100 3 14 5

225

= ≈

= ≈

.( . )( )( . )( )

.( )( )( . )( )

Ω

Ω

Cb

a k f

Ca

k f

FC

FC

1

2

100

4 100

=

=

( )( )( )

( )( )( )

Ω

Ω

π

π

MAX7032

C

DS- DS+R

DATASLICER

DATA

MAX7032 RSSI ORFSK DEMOD

100kΩ

CF2 CF1

100kΩ

DFOP+DS+

16 ______________________________________________________________________________________

Ω Ω

Ω

%%

MAX7032

PDMIN

TO SLICERINPUTBASEBAND

FILTER

MINIMUM PEAKDETECTOR

MAXIMUM PEAKDETECTOR

PDMAX

TRK_EN = 1

TRK_EN = 1

200mV/div

DATA OUTPUT2V/div

MIN PEAK DETECTOR

MAX PEAK DETECTOR

RECEIVER ENABLED, TRK_EN SETTRK_EN CLEARED

FILTER OUTPUT

DATA OUTPUT

100μs/div

MAX7032

C

PDMAX PDMINR

C

R

DATASLICER

DATA

PEAKDET

PEAKDET

______________________________________________________________________________________ 17

= =μ

μ RCS

RR R

ff

RF

XTAL−

⎛

⎝⎜

⎞

⎠⎟ × =16 4096

ff

RF

XTAL= =24 8439.

ff

MHzXTALRF=

−=

( . ).

10 724

12 67917

=

18 ______________________________________________________________________________________

=

CS

fC

C C C CPm

CASE LOAD CASE SPEC=

+−

+

⎛

⎝⎜

⎞

⎠⎟ ×2

1 1106

C[1:0] DESCRIPTION

0x0 No operation

0x1 Write data

0x2 Read data

0x3 Master reset

HI-Z

DATA OUT

CS

tCSS

tDS

tDH

tCH

tCL

tTH

DATA IN

tDV

HI-Z

tDO

tCSH

tTR

HI-Z

SCLK

DIO

tCS

tSC

D7 D0

______________________________________________________________________________________ 19

REGISTER A[5:0] REGISTER NAME DESCRIPTION

0x00 Power configurationEnables/disables the LNA, AGC, mixer, baseband, peakdetectors, PA, and RSSI output (see Table 5).

0x01 ControlControls AGC lock, gain state, peak-detector tracking, pollingtimer and FSK calibration, clock signal output, and sleep mode(see Table 6).

0x02 Configuration0Sets options for modulation, TX/RX mode, manual-gain mode,discontinuous receive mode, off-timer and on-timer prescalers(see Table 7).

0x03 Configuration1Sets options for automatic FSK calibration, clock output, outputclock divider ratio, AGC dwell timer (see Tables 8, 10, 11, and 12).

0x05 Oscillator frequencySets the internal clock frequency divisor. This register must be setto the integer result of fXTAL/100kHz (see the Oscillator FrequencyRegister (Address 0x05) section).

0x06 Off timer—tOFF (upper byte)

0x07 Off timer—tOFF (lower byte)Sets the duration that the MAX7032 remains in low-power modewhen DRX is active (see Table 12).

0x08 CPU recovery timer—tCPUIncreases maximum time the MAX7032 stays in lower power modewhile CPU wakes up when DRX is active (see Table 13).

0x09RF settling timer—tRF (upperbyte)

0x0ARF settling timer—tRF (lowerbyte)

During the time set by the RF settling timer, the MAX7032 ispowered on with the peak detectors and the data outputs disabledto allow time for the RF section to settle. DIO must be driven low atany time during tLOW = tCPU + tRF + tON or the timer sequencerestarts (see Table 14).

0x0B On timer—tON (upper byte)

0x0C On timer—tON (lower byte)Sets the duration that the MAX7032 remains in active mode whenDRX is active (see Table 15).

0x0DTransmitter low-frequencysetting—TxLOW (upper byte)

0x0ETransmitter low-frequencysetting—TxLOW (lower byte)

Sets the low frequency (FSK) of the transmitter or the carrierfrequency of ASK for the fractional-N synthesizer.

0x0FTransmitter high-frequencysetting—TxHIGH (upper byte)

0x10Transmitter high-frequencysetting—TxHIGH (lower byte)

Sets the high frequency (FSK) of the transmitter for the fractional-Nsynthesizer.

0x1A Status register (read only)Provides status for PLL lock, AGC state, crystal operation, pollingtimer, and FSK calibration (see Table 9).

20 ______________________________________________________________________________________

CS

DIO

SCLK

CS

DIO

SCLK

0 0 0 0 0 0 0 0A3 A2 A1 A0

READCOMMAND

READCOMMAND

ADDRESS DATA

R7 R6 R5 R4 R3 R2 R1 R0 R0R7

REGISTER DATA REGISTERDATA

0 0 0 0 0 0 0 0A3 A2 A1 A0

ADDRESS DATA

R7 R6 R5 R4 R3 R2 R1

REGISTER DATA

A3

16 BITS OF DATA

8 BITS OF DATA

1 0 A5 A4

1 0 A5 A4

C1 C0 A5 A4 A3 A2 A1 A0 D3 D2 D1 D0D7 D6 D5 D4

COMMAND ADDRESS DATA

CS

DIO

SCLK

CSCS

CS

______________________________________________________________________________________ 21

=

=

=

CS

CS

DATANAME (ADDRESS)

D7 D6 D5 D4 D3 D2 D1 D0

POWER[7:0] (0x00) LNA AGC MIXER BaseB PkDet PA RSSIO X

CONTRL[7:0] (0x01) AGCLK GAIN TRK_EN X PCAL FCAL CKOUT SLEEP

CONF0[7:0] (0x02) MODE T/R MGAIN DRX OFPS1 OFPS0 ONPS1 ONPS0

CONF1[7:0] (0x03) X ACAL CLKOF CDIV1 CDIV0 DT2 DT1 DT0

OSC[7:0] (0x05) OSC7 OSC6 OSC5 OSC4 OSC3 OSC2 OSC1 OSC0

tOFF[15:8] (0x06) tOFF 15 tOFF 14 tOFF 13 tOFF 12 tOFF 11 tOFF 10 tOFF 9 tOFF 8

tOFF[7:0] (0x07) tOFF 7 tOFF 6 tOFF 5 tOFF 4 tOFF 3 tOFF 2 tOFF 1 tOFF 0

tCPU[7:0] (0x08) tCPU 7 tCPU 6 tCPU 5 tCPU 4 tCPU 3 tCPU 2 tCPU 1 tCPU 0

tRF[15:8] (0x09) tRF 15 tRF 14 tRF 13 tRF 12 tRF 11 tRF 10 tRF 9 tRF 8

tRF[7:0] (0x0A) tRF 7 tRF 6 tRF 5 tRF 4 tRF 3 tRF 2 tRF 1 tRF 0

tON[15:8] (0x0B) tON 15 tON 14 tON 13 tON 12 tON 11 tON 10 tON 9 tON 8

tON[7:0] (0x0C) tON 7 tON 6 tON 5 tON 4 tON 3 tON 2 tON 1 tON 0

TxLOW[15:8] (0x0D) TxL15 TxL14 TxL13 TxL12 TxL11 TxL10 TxL9 TxL8

TxLOW[7:0] (0x0E) TxL7 TxL6 TxL5 TxL4 TxL3 TxL2 TxL1 TxL0

TxHIGH[15:8] (0x0F) TxH15 TxH14 TxH13 TxH12 TxH11 TxH10 TxH9 TxH8

TxHIGH[7:0] (0x10) TxH7 TxH6 TxH5 TxH4 TxH3 TxH2 TxH1 TxH0

STATUS[7:0] (0x1A) LCKD GAINS CLKON 0 0 0 PCALD FCALD

22 ______________________________________________________________________________________

BIT ID BIT NAME BIT LOCATION (0 = LSB) FUNCTION

AGCLK AGC locking feature 71 = Enable AGC lock0 = Disable AGC lock

GAIN Gain state 61 = Force manual high-gain state if MGAIN = 10 = Force manual low-gain state if MGAIN = 1

TRK_ENManual peak-detectortracking

51 = Force manual peak-detector tracking0 = Release peak-detector tracking

X None 4 Not used

PCAL Polling timer calibration 31 = Perform polling timer calibrationAutomatically reset to zero once calibration is completed

FCAL FSK calibration 21 = Perform FSK calibrationAutomatically reset to zero once calibration is completed

CKOUT Crystal clock output enable 11 = Enable crystal clock output0 = Disable crystal clock output

SLEEP Sleep mode 01 = Deep-sleep mode, regardless the state ofENABLE pin0 = Normal operation


LNA LNA enable 71 = Enable LNA0 = Disable LNA

AGC AGC enable 61 = Enable AGC0 = Disable AGC

MIXER Mixer enable 51 = Enable mixer0 = Disable mixer

BaseB Baseband enable 41 = Enable baseband0 = Disable baseband

PkDet Peak-detector enable 31 = Enable peak detector0 = Disable peak detector

PA Transmitter PA enable 21 = Enable PA0 = Disable PA

RSSIO RSSI amplifier enable 11 = Enable buffer0 = Disable buffer

X None 0 Not used

______________________________________________________________________________________ 23


MODE FSK or ASK modulation 7

1 = Enable FSK for both receive andtransmit0 = Enable ASK for both receive andtransmit

T/R Transmit or receive 6

1 = Enable transmit mode of thetransceiver, regardless the state of pinT/R0 = Enable receive mode of the transceiverwhen pin T/R = 0

MGAIN Manual gain mode 51 = Enable manual-gain mode0 = Disable manual-gain mode

DRXDiscontinuous receivemode

41 = Enable DRX0 = Disable DRX

OFPS1 Off-timer prescaler 3

OFPS0 Off-timer prescaler 2Sets the time base for the off timer (see theOff Timer (tOFF) section)

ONPS1 On-timer prescaler 1

ONPS0 On-timer prescaler 0Sets the time base for the on timer (see theOn Timer (tON) section)


X None 7 Not used

ACAL Automatic FSK calibration 61 = Enable automatic FSK calibration whencoming out of the sleep state in DRX mode0 = Disable automatic FSK calibration

CLKOFContinuous clock output(even during tOFF or whenENABLE pin is low)

5

1 = Enable continuous clock output when CKOUT= 10 = Continuous clock output; if CKOUT = 1, clockoutput is active during tON (DRX mode) or whenENABLE pin is high (continuous receive mode)

CDIV1 Crystal divider 4 CLKOUT crystal-divider MSB

CDIV0 Crystal divider 3 CLKOUT crystal-divider LSB

DT2 AGC dwell timer 2 AGC dwell timer MSB

DT1 AGC dwell timer 1 AGC dwell timer

DT0 AGC dwell timer 0 AGC dwell timer LSB

24 ______________________________________________________________________________________

CKOUT CDIV1 CDIV0CLOCKOUT

FREQUENCY

0 X X Disabled at logic 0

1 0 0 fXTAL

1 0 1 fXTAL/2

1 1 0 fXTAL/4

1 1 1 fXTAL/8

BIT ID BIT NAMEBIT LOCATION

(0 = LSB)FUNCTION

LCKD Lock detect 71 = Internal PLL is locked0 = Internal PLL is not locked so theMAX7032 does not receive or transmit data

GAINS AGC gain state 61 = LNA in high-gain state0 = LNA in low-gain state

CLKON Clock/crystal alive 51 = Valid clock at crystal inputs0 = No valid clock signal seen at the crystalinputs

X None 4 Zero

X None 3 Zero

X None 2 Zero

PCALDPolling timer calibrationdone

11 = Polling timer calibration is completed0 = Polling timer calibration is in progress ornot completed

FCALD FSK calibration done 01 = FSK calibration is completed0 = FSK calibration is in progress or notcompleted

≥

%

= = μμ

≥ μ ≈

==

=

=

f

K

XTAL=

2

______________________________________________________________________________________ 25

DT2 DT1 DT0 DESCRIPTION

0 0 0 K = 9

0 0 1 K = 11

0 1 0 K = 13

0 1 1 K = 15

1 0 0 K = 17

1 0 1 K = 19

1 1 0 K = 21

1 1 1 K = 23

OFPS1 OFPS0tOFF

TIME BASE

MIN tOFFREG 0x06 = 0x00REG 0x07 = 0x01

MAX tOFFREG 0x06 = 0xFFREG 0x07 = 0xFF

0 0 120μs 120μs 7.86s

0 1 480μs 480μs 31.46s

1 0 1920μs 1.92ms 2min 6s

1 1 7680μs 7.68ms 8min 23s

26 ______________________________________________________________________________________

CS

DIO

tOFF

ASK_DATA ORFSK_DATA

tCPU

tRF

tON

tOFF

tCPU

tRF

tON

tLOW

μ

= μ =

μ

μ

= μ =

μ

TIME BASE(μs)

MIN tCPUREG 0x08 = 0x01

(μs)

MAX tCPUREG 0x08 = 0xFF

(ms)

120 120 30.6

tRF TIME BASE(μs)

MIN tRFREG 0x09 = 0x00REG 0x0A = 0x01

(μs)

MAX tRFREG 0x09 = 0xFFREG 0x0A = 0xFF

(s)

120 120 7.86

______________________________________________________________________________________ 27

=

=

Ω

Ω =

ΩΩ

λλ

ONPS1 ONPS0 tON TIME BASEMIN tON

REG 0x0B = 0x00REG 0x0C = 0x01

MAX tONREG 0x0B = 0xFFREG 0x0C = 0xFF

0 0 120μs 120μs 7.86s

0 1 480μs 480μs 31.46s

1 0 1920μs 1.92ms 2min 6s

1 1 7680μs 7.68ms 8min 23s

28 ______________________________________________________________________________________

%

1

2

3

4

5

6

7

8

C8 L3

C6

9 10 11C10 C12

C9

12

L5

C11

13

IN OUTGND

14 15 16

Y2

C13

17

18

19

20

21

22

23

24

C17

R1

25262728293032 31

CLOCKOUTPUT

DIO

SCLK

MAX7032

3.0V

C23

VDD

VDD

PAVDD

ROUT

TX/RX1

TX/RX2

PAOUT

AVDD

LNAIN

LNASRC LNAO

UT

MIX

IN+

MIX

IN-

IFIN

+

IFIN

-

PDM

IN

PDM

AX

MIX

OUT

DS-

DS+

OP+

DF

RSSI

T/R

ENABLE

DATACLKO

UT

DVDD

HVINCSDIO

SCLK

XTAL

1

XTAL

2

CS

C20C21

Y1

L4

C14

C15

DATA

ENABLE

C16

TRANSMIT/RECEIVE

C22

C5C4

C18 C19

C7

L1

L2

C1C2

R2

R3*

*OPTIONAL POWER-ADJUST RESISTOR

C24

EXPOSEDPAD

C3

L6

VDD

VDD

VDD

COMPONENTVALUE FOR

433.92MHz RFVALUE FOR315MHz RF

DESCRIPTION

C1 220pF 220pF 10%

C2 680pF 680pF 10%

C3 6.8pF 12pF 5%

C4 6.8pF 10pF 5%

C5 10pF 22pF 5%

C6 220pF 220pF 10%

C7 0.1μF 0.1μF 10%

C8 100pF 100pF 5%

C9 1.8pF 2.7pF ±0.1pF

C10 100pF 100pF 5%

C11 220pF 220pF 10%

C12 100pF 100pF 5%

C13 1500pF 1500pF 10%

C14 0.047μF 0.047μF 10%

C15 0.047μF 0.047μF 10%

C16 470pF 470pF 10%

C17 220pF 220pF 10%

C18 220pF 220pF 10%

C19 0.01μF 0.01μF 10%

C20 100pF 100pF 5%

C21 100pF 100pF 5%

C22 220pF 220pF 10%

C23 0.01μF 0.01μF 10%

C24 0.01μF 0.01μF 10%

L1 22nH 27nH Coilcraft 0603CS




L5 16nH 30nH Murata LQW18A


R1 100kΩ 100kΩ 5%

R2 100kΩ 100kΩ 5%

R3 0Ω 0Ω —

Y1 17.63416MHz 12.67917MHzCrystal, 4.5pF load

capacitance

Y2 10.7MHz ceramic filter 10.7MHz ceramic filter Murata SFECV10.7 series

______________________________________________________________________________________ 29

30 ______________________________________________________________________________________

LNA

90°

0°

RSSI

IF LIMITINGAMPS

ASK

100kΩ100kΩ

DATA FILTER

7

8

9 10 11 12 14 13

FSKDEMODULATOR FSK

20

19

RXDATA

18

15

16

17

30

28

29

24

21

2322

SERIALINTERFACE ANDDIGITAL LOGIC

31

32

CRYSTALOSCILLATOR

1/K25

273.0V

REGULATOR

6

26

PAMAX7032

512

RX VCO

RXFREQUENCY

DIVIDER

PHASEDETECTOR

CHARGEPUMP

LOOP FILTER

TXFREQUENCY

DIVIDER

Σ

IQ

TX VCO

EXPOSEDPAD

LNAIN

LNASRC

TX/RX1 TX/RX2

XTAL1

XTAL2

CLKOUT

HVIN

AVDD

ROUT PAVDD PAOUT T/R DVDD ENABLE

DATA

DIO

CS

SCLK

DS-

PDMAX

PDMIN

DS+

RSSI

OP+

DF

IFIN+ IFIN-MIXOUTMIXIN-MIXIN+LNAOUT

3 4

______________________________________________________________________________________ 31

PROCESS: CMOSTOP VIEW

24 23 22 21 20 19 18

1 2 3 4 5 6 7

10

11

12

13

14

15

16

31

30

29

28

27

26

25

MAX7032

THIN QFN

DVDD

CLKOUT

HVIN

CS

DIO

SCLK

XTAL1

32

+

XTAL2

DATA

ENAB

LE

T/R

RSSI

DF OP+

DS+

17

DS-

PDMAX

PDMIN

IFIN+

IFIN-

MIXOUT

MIXIN-

MIXIN+

9 LNAOUT

LNAI

N

AVDD

8

LNAS

RC

PAOU

T

TX/R

X2

TX/R

X1

ROUT

PAVD

D

china.maxim-ic.com/packages

T3255+3 21-0140 90-0001

http://china.maxim-ic.com/packages

http://china.maxim-ic.com/packages

http://pdfserv.maxim-ic.com/package_dwgs/21-0140.PDF

http://pdfserv.maxim-ic.com/land_patterns/90-0001.PDF

0 5/05 —

1 6/09 16

2 11/101, 2, 5, 14,23, 25, 31

32 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600

© 2010 Maxim Integrated Products

Documents

Å þ å | - ÈBTL0GTL C í È R J kO J «QMMNBY8143 Å þ å | - ÈBTL0GTL C í È R J kO J «QMM 2 _____ ABSOLUTE MAXIMUM RATINGS Stresses beyond those listed under “Absolute Maximum